commit: e1e1e77f7df7cbee959ba024e5475907fe561c98
Best regards,
--
~Vinod
Applied, thanks!
[1/1] fsldma: Set correct dma_mask based on hw capability
commit: 00ff4d68a9ae4c9315c166f1fafa47f4c0a65f6f
Best regards,
--
~Vinod
, thanks!
[1/1] dt-bindings: dma: Convert fsl,elo*-dma to YAML
commit: 1fe283e850d6659dc3ccc295c6a0b470dd461047
Best regards,
--
~Vinod
_src for descript minmum and maxmum
> sample rates. And add 'src_d' in union snd_codec_options
> structure. These are mainly used for capbility query.
>
> Signed-off-by: Jaroslav Kysela
> Signed-off-by: Shengjiu Wang
> Acked-by: Jaroslav Kysela
Acked-by: Vinod Koul
--
~Vinod
ch 2 is for refining
> the code to make it can be shared by the "memory->asrc->memory"
> driver.
>
> Other change is to add memory to memory support for two kinds of i.MX ASRC
> modules.
Are there any patches for tinycompress to use the new IOCTLs here, I
would like to see those changes as well
--
~Vinod
; + int ret;
> +
> + dmamux = devm_kzalloc(&pdev->dev, sizeof(*dmamux), GFP_KERNEL);
> + if (!dmamux)
> + return -ENOMEM;
> +
> + dmamux->reg = syscon_node_to_regmap(np->parent);
> + if (IS_ERR(dmamux->reg)) {
> + dev_err(&pdev->dev, "syscon lookup failed\n");
> + return PTR_ERR(dmamux->reg);
> + }
> +
> + spin_lock_init(&dmamux->lock);
> + platform_set_drvdata(pdev, dmamux);
> + dmamux->dmarouter.dev = &pdev->dev;
> + dmamux->dmarouter.route_free = lpc32xx_dmamux_release;
> +
> + return of_dma_router_register(np, lpc32xx_dmamux_reserve,
> + &dmamux->dmarouter);
> +}
> +
> +static const struct of_device_id lpc32xx_dmamux_match[] = {
> + { .compatible = "nxp,lpc3220-dmamux" },
> + {},
> +};
> +
> +static struct platform_driver lpc32xx_dmamux_driver = {
> + .probe = lpc32xx_dmamux_probe,
> + .driver = {
> + .name = "lpc32xx-dmamux",
> + .of_match_table = lpc32xx_dmamux_match,
> + },
> +};
> +
> +static int __init lpc32xx_dmamux_init(void)
> +{
> + return platform_driver_register(&lpc32xx_dmamux_driver);
> +}
> +arch_initcall(lpc32xx_dmamux_init);
> --
> 2.25.1
--
~Vinod
| 8 ++---
> drivers/phy/tegra/xusb.c | 4 +--
Acked-by: Vinod Koul
--
~Vinod
t see the reasoning between some drivers using system_bh_wq
> and others being highpri?
>
> Given the DMA usecase I would expect them all to be high prio.
It didnt use tasklet_hi_schedule(), I guess Allen has done the
conversion of tasklet_schedule -> system_bh_wq and tasklet_hi_schedule
-> system_bh_highpri_wq
Anyway, we are going to use a dma queue so should be better performance
--
~Vinod
on using completion. I dropped it as I thought it would
> be easier to move to workqueues.
>
> Vinod, I would like to give this a shot and put out a RFC, I would
> really appreciate review and feedback.
Sounds like a good plan to me
--
~Vinod
art of the
> > dma_dev rather than the dma_chan.
> >
>
> Alright, I will work on moving work_struck into the dma_chan and
> leave the dma_dev as is (using bh workqueues) and post a RFC.
> Once reviewed, I could move to the next step.
That might be better from a performance pov but the current design is a
global tasklet and not a per chan one... We would need to carefully
review and test this for sure
--
~Vinod
On 28-03-24, 11:08, Arnd Bergmann wrote:
> On Thu, Mar 28, 2024, at 06:55, Vinod Koul wrote:
> > On 27-03-24, 16:03, Allen Pais wrote:
> >> The only generic interface to execute asynchronously in the BH context is
> >> tasklet; however, it's marked deprecat
pi_ring ev_ring;
> - struct tasklet_struct ev_task; /* event processing tasklet */
> + struct work_struct ev_task; /* event processing work */
> struct completion cmd_completion;
> enum gpi_cmd gpi_cmd;
> u32 cntxt_type_irq_msk;
> @@ -755,7 +756,7 @@ static void gpi_process_ieob(struct gpii *gpii)
> gpi_write_reg(gpii, gpii->ieob_clr_reg, BIT(0));
>
> gpi_config_interrupts(gpii, MASK_IEOB_SETTINGS, 0);
> - tasklet_hi_schedule(&gpii->ev_task);
> + queue_work(system_bh_highpri_wq, &gpii->ev_task);
This is good conversion, thanks for ensuring system_bh_highpri_wq is
used here
--
~Vinod
devm allocated stuff
> (here e.g. *mdev) is freed. So it can probably easily happen, that
> something tries to use the dma device and this will likely result in an
> oops.
We should convert these too, thanks for your work for the conversion
--
~Vinod
llback returning
void
commit: b1c50ac25425385b576dd58b7b38c1c5963dde85
Best regards,
--
~Vinod
explicitly include the correct includes.
>
> [...]
Applied, thanks!
[1/1] dmaengine: Explicitly include correct DT includes
commit: 897500c7ea91702966adb9b412fa39400b4edee6
Best regards,
--
~Vinod
On 16-05-23, 11:11, Sean Anderson wrote:
> On 5/16/23 09:22, Vinod Koul wrote:
> > On 09-05-23, 11:26, Sean Anderson wrote:
> >> On 5/9/23 09:00, Vinod Koul wrote:
> >> > On 08-05-23, 11:31, Sean Anderson wrote:
> >> >> On 5/8/23 05:15, Vinod Koul
On 08-05-23, 11:28, Sean Anderson wrote:
> On 5/8/23 05:22, Vinod Koul wrote:
> > On 13-04-23, 12:05, Sean Anderson wrote:
> >> +static const struct lynx_cfg ls1088a_cfg = {
> >> + .lanes = 4,
> >> + .endian = REGMAP_ENDIAN_LITTLE,
> >&
On 09-05-23, 11:26, Sean Anderson wrote:
> On 5/9/23 09:00, Vinod Koul wrote:
> > On 08-05-23, 11:31, Sean Anderson wrote:
> >> On 5/8/23 05:15, Vinod Koul wrote:
> >
> >> >> +int lynx_clks_init(struct device *dev, struct regmap *regmap,
> >> >&
On 08-05-23, 11:31, Sean Anderson wrote:
> On 5/8/23 05:15, Vinod Koul wrote:
> >> +int lynx_clks_init(struct device *dev, struct regmap *regmap,
> >> + struct clk *plls[2], struct clk *ex_dlys[2], bool compat);
> >
> > so you have an exported symbol
On 13-04-23, 12:05, Sean Anderson wrote:
> This adds support for the Lynx 10G "SerDes" devices found on various NXP
> QorIQ SoCs. There may be up to four SerDes devices on each SoC, each
> supporting up to eight lanes. Protocol support for each SerDes is highly
> heterogeneous, with each SoC typica
et = lynx_clk_init(hw_data, dev, regmap, i, compat);
> + if (ret)
> + return ret;
> +
> + plls[i] = devm_clk_hw_get_clk(dev,
> + hw_data->hws[LYNX10G_PLLa(i)],
> + NULL);
> + if (IS_ERR(plls[i]))
> + return PTR_ERR(plls[i]);
> +
> + ex_dlys[i] = devm_clk_hw_get_clk(dev,
> +
> hw_data->hws[LYNX10G_PLLa_EX_DLY(i)],
> + NULL);
> + if (IS_ERR(ex_dlys[i]))
> + return PTR_ERR(plls[i]);
> + }
> +
> + ret = devm_of_clk_add_hw_provider(dev, of_clk_hw_onecell_get, hw_data);
> + if (ret)
> + dev_err_probe(dev, ret, "could not register clock provider\n");
> +
> + return ret;
> +}
> +EXPORT_SYMBOL_GPL(lynx_clks_init);
> +
> +MODULE_AUTHOR("Sean Anderson ");
> +MODULE_DESCRIPTION("Lynx 10G PLL driver");
> +MODULE_LICENSE("GPL");
> diff --git a/drivers/phy/freescale/Kconfig b/drivers/phy/freescale/Kconfig
> index 853958fb2c06..5d461232276f 100644
> --- a/drivers/phy/freescale/Kconfig
> +++ b/drivers/phy/freescale/Kconfig
> @@ -47,3 +47,9 @@ config PHY_FSL_LYNX_28G
> found on NXP's Layerscape platforms such as LX2160A.
> Used to change the protocol running on SerDes lanes at runtime.
> Only useful for a restricted set of Ethernet protocols.
> +
> +config PHY_FSL_LYNX_10G
> + tristate
> + depends on COMMON_CLK
> + depends on ARCH_LAYERSCAPE || PPC || COMPILE_TEST
> + select REGMAP_MMIO
Why is this change in clk driver part?
> diff --git a/include/linux/phy/lynx-10g.h b/include/linux/phy/lynx-10g.h
> new file mode 100644
> index ..b7b80b3ee988
> --- /dev/null
> +++ b/include/linux/phy/lynx-10g.h
> @@ -0,0 +1,16 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +/*
> + * Copyright (C) 2022 Sean Anderson
> + */
> +
> +#ifndef LYNX_10G
> +#define LYNX_10G
> +
> +struct clk;
> +struct device;
> +struct regmap;
> +
> +int lynx_clks_init(struct device *dev, struct regmap *regmap,
> +struct clk *plls[2], struct clk *ex_dlys[2], bool compat);
so you have an exported symbol for clk driver init in phy driver header?
can you please explain why..?
> +
> +#endif /* LYNX 10G */
> --
> 2.35.1.1320.gc452695387.dirty
--
~Vinod
On 11-04-23, 14:43, Sean Anderson wrote:
> This adds support for the Lynx 10G "SerDes" devices found on various NXP
> QorIQ SoCs. There may be up to four SerDes devices on each SoC, each
> supporting up to eight lanes. Protocol support for each SerDes is highly
> heterogeneous, with each SoC typica
On 19-01-23, 11:22, Sean Anderson wrote:
> On 1/18/23 11:54, Vinod Koul wrote:
> > On 17-01-23, 11:46, Sean Anderson wrote:
> >>
> >> I noticed that this series is marked "changes requested" on patchwork.
> >> However, I have received only automate
ate getting another round of review before resending this series.
Looking at the series, looks like kernel-bot sent some warnings on the
series so I was expecting an updated series for review
--
~Vinod
nx_clk *clk;
> + char *ref_name;
> + int ret;
> +
> + clk = devm_kzalloc(dev, sizeof(*clk), GFP_KERNEL);
> + if (!clk)
> + return -ENOMEM;
> +
> + clk->dev = dev;
> + clk->regmap = regmap;
> + clk->idx = index;
> +
> + ref_name = kasprintf(GFP_KERNEL, "ref%d", index);
> + pll_init.name = kasprintf(GFP_KERNEL, "%s.pll%d_khz", dev_name(dev),
> + index);
> + ex_dly_init.name = kasprintf(GFP_KERNEL, "%s.pll%d_ex_dly_khz",
> + dev_name(dev), index);
> + if (!ref_name || !pll_init.name || !ex_dly_init.name) {
> + ret = -ENOMEM;
> + goto out;
> + }
> +
> + ref = devm_clk_get(dev, ref_name);
> + if (IS_ERR(clk->ref)) {
> + ret = PTR_ERR(clk->ref);
> + dev_err_probe(dev, ret, "could not get %s\n", ref_name);
> + goto out;
> + }
> +
> + clk->ref = __clk_get_hw(ref);
> + pll_parents = clk->ref;
> + clk->pll.init = &pll_init;
> + ret = devm_clk_hw_register(dev, &clk->pll);
> + if (ret) {
> + dev_err_probe(dev, ret, "could not register %s\n",
> + pll_init.name);
> + goto out;
> + }
> +
> + ex_dly_parents = &clk->pll;
> + clk->ex_dly.init = &ex_dly_init;
> + ret = devm_clk_hw_register(dev, &clk->ex_dly);
> + if (ret)
> + dev_err_probe(dev, ret, "could not register %s\n",
> + ex_dly_init.name);
> +
> + hw_data->hws[LYNX10G_PLLa(index)] = &clk->pll;
> + hw_data->hws[LYNX10G_PLLa_EX_DLY(index)] = &clk->ex_dly;
> +
> +out:
> + kfree(ref_name);
> + kfree(pll_init.name);
> + kfree(ex_dly_init.name);
> + return ret;
> +}
> +
> +#define NUM_PLLS 2
> +#define NUM_CLKS (NUM_PLLS * LYNX10G_CLKS_PER_PLL)
> +
> +int lynx_clks_init(struct device *dev, struct regmap *regmap,
> +struct clk *plls[2], struct clk *ex_dlys[2])
> +{
> + int ret, i;
> + struct clk_hw_onecell_data *hw_data;
> +
> + hw_data = devm_kzalloc(dev, struct_size(hw_data, hws, NUM_CLKS),
> +GFP_KERNEL);
> + if (!hw_data)
> + return -ENOMEM;
> + hw_data->num = NUM_CLKS;
> +
> + for (i = 0; i < NUM_PLLS; i++) {
> + ret = lynx_clk_init(hw_data, dev, regmap, i);
> + if (ret)
> + return ret;
> +
> + plls[i] = hw_data->hws[LYNX10G_PLLa(i)]->clk;
> + ex_dlys[i] = hw_data->hws[LYNX10G_PLLa_EX_DLY(i)]->clk;
> + }
> +
> + ret = devm_of_clk_add_hw_provider(dev, of_clk_hw_onecell_get, hw_data);
> + if (ret)
> + dev_err_probe(dev, ret, "could not register clock provider\n");
> +
> + return ret;
> +}
Why is this not a clock driver in drivers/clk/ ?
> +#define abs_diff(a, b) ({ \
> + typeof(a) _a = (a); \
> + typeof(b) _b = (b); \
> + _a > _b ? _a - _b : _b - _a; \
> +})
are you sure there is not existing helper which can help you with this?
--
~Vinod
y feedback addressed would be
right...
> [1] https://patchwork.kernel.org/project/linux-phy/list/?series=673741&state=*
> [2] https://patchwork.kernel.org/project/linux-phy/list/?series=665484&state=*
--
~Vinod
On 30-08-22, 17:44, Sean Anderson wrote:
>
> ping?
>
> Vinod/Kishon: any comments on the driver itself?
Not sure why this is not in my queue or pw, can you please rebase and
resend
Thanks
--
~Vinod
On 10-12-21, 23:19, Thomas Gleixner wrote:
> From: Thomas Gleixner
>
> Just use the core function msi_get_virq().
Acked-By: Vinod Koul
--
~Vinod
On 10-12-21, 23:19, Thomas Gleixner wrote:
> From: Thomas Gleixner
>
> There is no reason to walk the MSI descriptors to retrieve the interrupt
> number for a device. Use msi_get_virq() instead.
Acked-By: Vinod Koul
--
~Vinod
On 10-12-21, 23:19, Thomas Gleixner wrote:
> From: Thomas Gleixner
>
> Storing a pointer to the MSI descriptor just to keep track of the Linux
> interrupt number is daft. Use msi_get_virq() instead.
Acked-By: Vinod Koul
--
~Vinod
lied, thanks
--
~Vinod
d buses return an ignored error code and so don't anticipate
> wrong expectations for driver authors.
Acked-By: Vinod Koul
--
~Vinod
!
Droped the series now
--
~Vinod
function.
>
> It was added in the probe function only in commit d3f620b2c4fe ("fsldma:
> simplify IRQ probing and handling")
Applied both, thanks
--
~Vinod
_ADDR_T_64BIT it really
> looks like it always returned a completely incorrect value.
>
> And again - the driver may have worked even with that completely
> incorrect value, since the use of it seems to be very incidental.
Thank you for the fix.
Acked-By: Vinod Koul
>
> I
gh */
> case DMA_DEV_TO_MEM:
> off += _ldst_peripheral(pl330, dry_run, &buf[off], pxs, cyc,
> cond);
> @@ -1266,7 +1263,6 @@ static int _dregs(struct pl330_dmac *pl330, unsigned
> int dry_run, u8 buf[],
>
> switch (pxs->desc->rqtype) {
> case DMA_MEM_TO_DEV:
> - /* fall through */
replacement missed here and above few
--
~Vinod
:26: warning: this statement may fall through
> [-Wimplicit-fallthrough=]
>chan->toggle_ext_pause = fsl_chan_toggle_ext_pause;
>~~~^~~
> drivers/dma/fsldma.c:1166:2: note: here
> case FSL_DMA_IP_83XX:
> ^~~~
Applied, thanks
--
~Vinod
On 25-01-19, 05:54, Peng Ma wrote:
> Hi Vinod,
>
> Sorry to replay late.
> 1:This patch has already send to the patchwork.
> Please see the patch link: https://patchwork.kernel.org/patch/10741521/
> 2:I have already compile the fsl patches on arm and powerpc afte
u64 fsl_addr_hi = (u64)in_be32((u32 *)fsl_addr) << 32;
> >> -
> >> - return fsl_addr_hi | in_be32((u32 *)(fsl_addr + 1));
> >> -}
> >> -
> >> -static void fsl_iowrite64be(u64 val, u64 __iomem *addr) -{
> >> - out_be32((u32 __iomem *)addr, val >> 32);
> >> - out_be32((u32 __iomem *)addr + 1, (u32)val);
> >> -}
> >> -#endif
> >> +#define fsl_ioread64(p)in_le64(p)
> >> +#define fsl_ioread64be(p) in_be64(p)
> >> +#define fsl_iowrite64(v, p)out_le64(p, v)
> >> +#define fsl_iowrite64be(v, p) out_be64(p, v)
> >> #endif
> >
> >Then you'll break 32-bit, assuming those fake-it-with-two-32-bit-accesses
> >were actually needed.
> >
> >-Scott
> >
>
--
~Vinod
On 30-10-18, 10:35, Peng Ma wrote:
> From: Wen He
>
> This patch implement a standard macro call functions is
> used to NXP dma drivers.
Applied all except DTS patches, thanks
--
~Vinod
global macro NUMA_NO_NODE. This helps remove NUMA related assumptions like
> 'invalid node' from various places redirecting them to a common definition.
>
> drivers/dma/dmaengine.c | 4 +++-
Acked-by: Vinod Koul
--
~Vinod
for -1 unless it return NUMA_NO_NODE
--
~Vinod
off and signed off from orignal
authors
Also as Rob pointed out this patch series should be v8 or so as this is
following the previous work submitted to the list
Please also indicated changes from last rev which help in the review.
--
~Vinod
On 17-08-18, 06:00, Barry Song wrote:
> as you are already in a tasklet, it is unnecessary to call spin_lock_bh.
Applied all, thanks
You may want to check you send-mail options, they patches were all over
my inbox and npot threaded
--
~Vinod
on via:
> $ ./scripts/checkpatch.pl -f --types=SYMBOLIC_PERMS --fix-inplace
>
> Miscellanea:
>
> o Wrapped one multi-line call to a single line
>
> Signed-off-by: Joe Perches
> ---
> sound/core/compress_offload.c | 2 +-
Acked-By: Vinod Koul
--
~Vinod
subsystem, I
> can
> provide this as well. Just mail me.
Applied all, thanks
--
~Vinod
On Thu, Apr 19, 2018 at 04:05:37PM +0200, Wolfram Sang wrote:
> We should get drvdata from struct device directly. Going via
> platform_device is an unneeded step back and forth.
Do you mind splitting this per driver please, that makes it easy to manage
for me :)
--
~Vinod
On Mon, Jun 19, 2017 at 04:40:04PM +0200, Thomas Breitung wrote:
> The bits of BWC, DAHTS and SAHTS in the DMA mode register must be cleared
> before a new value can be or-ed in.
Applied, thanks
--
~Vinod
On Thu, Jun 08, 2017 at 03:25:28PM +0200, Christoph Hellwig wrote:
> DMA_ERROR_CODE is not a public API and will go away. Instead properly
> unwind based on the loop counter.
Acked-By: Vinod Koul
--
~Vinod
On Wed, Sep 28, 2016 at 04:15:11PM +0530, Arvind Yadav wrote:
> Free memory mapping, if probe is not successful.
Please use proper subsystem tags for patches. Hint: use git log to find that
out
Applied after fixing the tag
--
~Vinod
On Sat, Sep 10, 2016 at 07:56:04PM +1000, Michael Ellerman wrote:
> We'd like to eventually remove NO_IRQ on powerpc, so remove usages of it
> from powerpc-only drivers.
Applied after fixing subsystem name
--
~Vinod
On Tue, Jun 21, 2016 at 06:19:50PM +0100, Jon Hunter wrote:
>
> On 21/06/16 17:01, Vinod Koul wrote:
> > On Wed, Jun 08, 2016 at 09:51:57AM +0100, Jon Hunter wrote:
> >> Hi Peter,
> >>
> >> On 07/06/16 18:38, Peter Griffin wrote:
> >>> Th
On Tue, Jun 07, 2016 at 06:38:33PM +0100, Peter Griffin wrote:
> Hi Vinod,
>
> This series is a bunch of cleanup updates to various
> dmaengine drivers, based on some of the review feeback to my fdma series.
Good cleanup, Applied, thanks
if (txstate) {
> + residual = dma_desc->bytes_requested -
> + (dma_desc->bytes_transferred %
> + dma_desc->bytes_requested);
> + dma_set_residue(txstate, residual);
> + }
> +
I feel this optimizes stuff, which seems okay. Feel free to send as proper
patch.
> spin_unlock_irqrestore(&tdc->lock, flags);
> return ret;
> }
>
> Cheers
> Jon
>
> --
> nvpublic
--
~Vinod
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> > Signed-off-by: Peter Griffin
>
> Acked-by: Linus Walleij
>
> A few subsystems may use a cleanup like this...
> I wonder how many unnecessary prints I've introduced
> myself :P
Yes that should be case with mine too :)
I think adding a coccinelle scr
, Tejun Heo wrote:
> >> >> On Sun, May 08, 2016 at 04:00:08PM -0400, Tejun Heo wrote:
> >> >>> Hello, Andy.
> >> >>>
> >> >>> On Wed, May 04, 2016 at 03:22:51PM +0300, Andy Shevchenko wrote:
> >> >>> > Tejun,
On Fri, Apr 29, 2016 at 10:09:07PM +0200, Julia Lawall wrote:
> Dma_pool_zalloc combines dma_pool_alloc and memset 0. The semantic patch
> that makes this transformation is as follows: (http://coccinelle.lip6.fr/)
Applied all dmaengine patches
--
On Wed, Apr 20, 2016 at 05:32:11PM +0200, Geert Uytterhoeven wrote:
> Signed-off-by: Geert Uytterhoeven
> ---
> Documentation/devicetree/bindings/sound/davinci-mcbsp.txt | 2 +-
This change does not apply for me, can you please split it up and send the
sound ones thru sound tree
-
On Tue, Mar 08, 2016 at 02:02:01PM +0800, xuelin@nxp.com wrote:
> From: Xuelin Shi
>
> adding unmap of sources and destinations while doing dequeue.
Applied, thanks
--
~Vinod
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On Tue, Oct 27, 2015 at 11:42:57PM +0300, Alexander Popov wrote:
> >> Hello,
> >>
> >> I've done my best to fix the issues pointed by Timur Tabi and Vinod Koul.
> >> Could I have a feedback please?
> >
> > I dont see to have v4 in my list :( Ca
peripheral devices on LocalPlus Bus.
>
> > Changes in v4:
> > - the race condition is fixed;
> > - plenty of style fixes are made;
> > - devm_* functions and EPROBE_DEFER are used in probe().
>
> Hello,
>
> I've done my best to fix the issues pointed by Tim
not move init
levels and esnure we have right solutions using defered probe
--
~Vinod
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)
{
struct device *dev, *chandev;
--
~Vinod
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+ &paddr);
> + if (!desc || !cf) {
> + kfree(desc);
> + break;
here as well...
> + /* Output Ring */
> + __be32 oubring_base_h; /* Outbound Ring Base Address
HIFT 8
> +#define RE_JR_INB_SLOT_AVAIL(x) ((x) >> RE_JR_INB_SLOT_AVAIL_SHIFT)
reading thru driver made me curious on what JR stands for?
> +#define RE_PQ_OPCODE 0x1B
> +#define RE_XOR_OPCODE0x1A
> +#define RE_MOVE_OPCODE
On Fri, Oct 17, 2014 at 02:13:20AM +, Xuelin Shi wrote:
> Hi Dan & Vinod,
>
> I have sent out the v4 of this patch and not received any further feedback
> yet.
>
> This patch looks ruled out from the patchwork.
> https://patchwork.kernel.org/project/linux-dmaengin
as users have been converted, so no need of this custom method
Signed-off-by: Vinod Koul
---
include/linux/dmaengine.h |3 ---
1 files changed, 0 insertions(+), 3 deletions(-)
diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h
index ce8a08e..3254a03 100644
--- a/include
since users have been move to fsl_dma_external_start() API, so remove this
now
Signed-off-by: Vinod Koul
---
drivers/dma/fsldma.c |9 -
1 files changed, 0 insertions(+), 9 deletions(-)
diff --git a/drivers/dma/fsldma.c b/drivers/dma/fsldma.c
index 0cded86..994bcb2 100644
--- a
carma-fpga driver uses device control with custom FSLDMA_EXTERNAL_START
command. Since we wnat to deprecate the device control, move this driver to
use new fsl_dma_external_start() API
Signed-off-by: Vinod Koul
---
drivers/misc/carma/carma-fpga-program.c |3 ++-
1 files changed, 2
The drivers should use dmaengine_slave_config() and dmaengine_prep_dma_sg()
API instead of accessing the device_control which will be deprecated soon
Signed-off-by: Vinod Koul
---
drivers/misc/carma/carma-fpga-program.c |9 -
1 files changed, 4 insertions(+), 5 deletions(-)
diff
The freescale driver uses custom device control FSLDMA_EXTERNAL_START to
put the controller in external start mode.
Since we are planning to deprecate the device control, move this to exported
API. Subsequent patches will remove the FSLDMA_EXTERNAL_START
Signed-off-by: Vinod Koul
---
drivers
This was only prep API which didnt have an helper
Signed-off-by: Vinod Koul
---
include/linux/dmaengine.h | 10 ++
1 files changed, 10 insertions(+), 0 deletions(-)
diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h
index 3d291f5..ce8a08e 100644
--- a/include/linux
to new dependency.
Vinod Koul (6):
dmaengine: add dmaengine_prep_dma_sg() helper
dmaengine: freescale: add and export fsl_dma_external_start()
carma-fpga: use dmaengine_xxx() API
carma-fpga: move to fsl_dma_external_start()
dmaengine: freescale: remove FSLDMA_EXTERNAL_START control
t:
> #dma-cells is made a required property, as it must be according
> dma/dma.txt document.
Applied, thanks
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On Wed, May 21, 2014 at 04:03:00PM +0800, hongbo.zh...@freescale.com wrote:
> From: Hongbo Zhang
>
> Hi Dan,
> Please have a look at this 3/3 as Vinod mentioned.
>
> Hi Vinod Koul,
> Please have a look at the v5 patch set.
I dont see any objection, so applying all 3 wi
> A new patch (part 2/7) is added to this series.
> Part 6/7:
> - change the description of 'compatible' property according part 2/7;
> - improve the document according Gerhard's feedback;
>
> Parts 1/7, 2/7 and 4/7 have been applied by Vinod Koul and
> are excl
; previously supported mem-to-mem transfers.
Applied, after fixing sybstem name to "dmaengine"
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On Thu, May 15, 2014 at 06:15:31PM +0400, Alexander Popov wrote:
> Fix comment typo.
Applied, thanks
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On Thu, May 08, 2014 at 05:52:37PM +0800, Hongbo Zhang wrote:
>
> On 05/07/2014 04:31 PM, Shevchenko, Andriy wrote:
> >On Sun, 2014-05-04 at 18:22 +0800, Hongbo Zhang wrote:
> >>On 05/03/2014 12:46 AM, Vinod Koul wrote:
> >>>On Fri, Apr 18, 2014 at 04:17:51PM
4_BYTES ||
> > and why this limtation, doesnt seem covered above?
> I created this limitation because FIFO registers of LPC and SDHC
> support _only_ 4-byte access.
>
> I tried to cover this limitation in the statement "minimal transfer chunk
> is 4 bytes". Should I mak
need
> to use it because the original code always frees IRQ manually with
> devm_free_irq(). Replace devm_free_irq() with free_irq() accordingly.
Applied, thanks
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On Wed, Apr 23, 2014 at 05:53:24PM +0400, Alexander Popov wrote:
> MPC512x and MPC8308 have similar DMA controllers, but are independent SoCs.
> DMA controller driver should have separate 'compatible' values for these SoCs.
>
> Signed-off-by: Alexander Popov
Appli
gned-off-by: Alexander Popov
> Acked-by: Anatolij Gustschin
Applied, thanks
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On Wed, Apr 23, 2014 at 05:53:27PM +0400, Alexander Popov wrote:
> This patch adds a new common OF dma xlate callback function which will match a
> channel by it's id. The binding expects one integer argument which it will
> use to
> lookup the channel by the id.
>
> Unlike of_dma_simple_xlate th
{
> + return -EINVAL;
> + }
> +
> + spin_lock_irqsave(&mchan->lock, flags);
> +
> + mchan->src_per_paddr = cfg->src_addr;
> + mchan->src_tcd_nunits = cfg->src_maxburst;
> + mchan->dst_per_paddr =
e and early suspend to ensure they get
suspended after clients (who should use normal ones) and resume before them
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On Fri, Apr 18, 2014 at 04:17:48PM +0800, hongbo.zh...@freescale.com wrote:
> From: Hongbo Zhang
>
> These functions will be modified in the next patch in the series. By moving
> the
> function in a patch separate from the changes, it will make review easier.
>
Applied,
rect choice.
>
This doesnt apply, perhpas due to depends on 6/8
--
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> Signed-off-by: Hongbo Zhang
> Signed-off-by: Qiang Liu
> ---
> drivers/dma/fsldma.c | 25 ++---
> 1 file changed, 10 insertions(+), 15 deletions(-)
>
> diff --git a/drivers/dma
On Fri, Apr 18, 2014 at 04:17:49PM +0800, hongbo.zh...@freescale.com wrote:
This need review from Dan ...
--
~Vinod
> From: Hongbo Zhang
>
> Fix the potential risk when enable config NET_DMA and ASYNC_TX. Async_tx is
> lack of support in current release process of dma des
are wrappers of DMA_IN/OUT, and even for the BCR register, it
> is read by get_bcr but written by DMA_OUT.
> This patch unifies the inconsistent methods, all registers are accessed by
> get/set_* now.
>
Applied, thanks
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On Fri, Apr 18, 2014 at 04:17:47PM +0800, hongbo.zh...@freescale.com wrote:
> From: Hongbo Zhang
>
> There are several places where descriptors are freed using identical code.
> This patch puts this code into a function to reduce code duplication.
>
Applied, tha
On Fri, Apr 18, 2014 at 04:17:46PM +0800, hongbo.zh...@freescale.com wrote:
> From: Hongbo Zhang
>
> Delete attribute DMA_INTERRUPT because fsldma doesn't support this function,
> exception will be thrown if talitos is used to offload xor at the same time.
>
Applied
orresponding DEBUG macro to switch on/off dev_dbg, and most of the other
> codes are also calling chan_dbg directly without using FSL_DMA_LD_DEBUG.
>
Applied, thanks
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On Mon, Mar 31, 2014 at 12:08:55PM +0800, Hongbo Zhang wrote:
>
> On 03/29/2014 09:45 PM, Vinod Koul wrote:
> >On Fri, Mar 28, 2014 at 02:33:37PM +0800, Hongbo Zhang wrote:
> >>On 03/26/2014 03:01 PM, Vinod Koul wrote:
> >>>On Thu, 2014-01-16 at 13:47 +0800,
On Fri, Mar 28, 2014 at 02:33:37PM +0800, Hongbo Zhang wrote:
>
> On 03/26/2014 03:01 PM, Vinod Koul wrote:
> >On Thu, 2014-01-16 at 13:47 +0800, hongbo.zh...@freescale.com wrote:
> >>From: Hongbo Zhang
> >>
> >>The usage of spin_lock_irqsave()
ock, flags);
> + spin_lock_bh(&chan->desc_lock);
okay here is the problem :(
You moved to _bh variant. So if you grab the lock in rest of the code
and irq gets triggered then here we will be spinning to grab the lock.
So effectively you made right locking solution into deadlock situation!
>
>
mchan->per_paddr = cfg->dst_addr;
> >> + mchan->tcd_nunits = cfg->dst_maxburst;
> >> + }
> >
> > Ditto.
>
> Excuse me, I don't understand this point.
> I have to use cfg->di
e DMA channel
> + * @desc: descriptor to be freed
> + */
> +static void fsl_dma_free_descriptor(struct fsldma_chan *chan,
> + struct fsl_desc_sw *desc)
> +{
> + list_del(&desc->node);
> +#ifdef FSL_DMA_LD_DEBUG
> + chan_dbg(chan, "LD %p free\n", d
memory performance are decreased very slightly, while the others are even
> better.
> Tested on T4240.
Applied, thanks
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Do other platforms
> have several dedicated DMA controllers, some for peripherals and
> some for memory transfers? Should the "private" flag apply to
> channels and not whole controllers? Am I over-estimating the
> benefit or importance of DMA supported memory transfers?
The DMA_PRIVATE flag
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