From: Guo Ren
Make "uapi asm unistd.h" could be used for architectures' COMPAT
mode. The __SYSCALL_COMPAT is first used in riscv.
Signed-off-by: Guo Ren
Signed-off-by: Guo Ren
Cc: Arnd Bergmann
---
include/uapi/asm-generic/unistd.h | 4 ++--
tools/include/uapi/asm-generic/unistd.h | 4
From: Guo Ren
There are 7 64bit architectures that support Linux COMPAT mode to
run 32bit applications. A lot of definitions are duplicate:
- COMPAT_USER_HZ
- COMPAT_RLIM_INFINITY
- COMPAT_OFF_T_MAX
- __compat_uid_t, __compat_uid_t
- compat_dev_t
- compat_ipc_pid_t
- struct compat_flock
-
From: Guo Ren
RISC-V doesn't neeed compat_stat, so using __ARCH_WANT_COMPAT_STAT
to exclude unnecessary SYSCALL functions.
Signed-off-by: Guo Ren
Signed-off-by: Guo Ren
Reviewed-by: Arnd Bergmann
---
arch/arm64/include/asm/unistd.h | 1 +
arch/mips/include/asm/unistd.h| 2 ++
arch/pari
From: Guo Ren
The existing per-arch definitions are pretty much historic cruft.
Move SYSVIPC_COMPAT into init/Kconfig.
Signed-off-by: Guo Ren
Signed-off-by: Guo Ren
Acked-by: Arnd Bergmann
Cc: Christoph Hellwig
---
arch/arm64/Kconfig | 4
arch/mips/Kconfig| 5 -
arch/parisc/K
ycon=sbi" -netdev user,id=net0 -device
virtio-net-device,netdev=net0
QEMU emulator version 6.2.50 (v6.2.0-29-g196d7182c8)
OpenSBI v0.9
[0.00] Linux version 5.16.0-rc6-00017-g750f87086bdd-dirty
(guoren@guoren-Z87-HD3) (riscv64-unknown-linux-gnu-gcc (GCC) 10.2.0, GNU ld
(GNU Binuti
From: Guo Ren
Adds initial skeletal COMPAT Kbuild (Runing 32bit U-mode on 64bit
S-mode) support.
- Setup kconfig & dummy functions for compiling.
- Implement compat_start_thread by the way.
Signed-off-by: Guo Ren
Signed-off-by: Guo Ren
Cc: Arnd Bergmann
---
arch/riscv/Kconfig | 19
From: Guo Ren
If the current task is in COMPAT mode, set SR_UXL_32 in status for
returning userspace.
Signed-off-by: Guo Ren
Signed-off-by: Guo Ren
Cc: Arnd Bergmann
---
arch/riscv/kernel/process.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/riscv/kernel/process.c b/arch/ri
From: Guo Ren
Now, you can use native gdb on riscv64 for rv32 app debugging.
$ uname -a
Linux buildroot 5.16.0-rc4-00036-gbef6b82fdf23-dirty #53 SMP Mon Dec 20
23:06:53 CST 2021 riscv64 GNU/Linux
$ cat /proc/cpuinfo
processor : 0
hart: 0
isa : rv64imafdcsuh
mmu
From: Guo Ren
Implement compat_setup_rt_frame for sigcontext save & restore. The
main process is the same with signal, but the rv32 pt_regs' size
is different from rv64's, so we needs convert them.
Signed-off-by: Guo Ren
Signed-off-by: Guo Ren
Cc: Arnd Bergmann
---
arch/riscv/kernel/Makefile
From: Guo Ren
Reconstruct __setup_additional_pages() by appending vdso info
pointer argument to meet compat_vdso_info requirement. And change
vm_special_mapping *dm, *cm initialization into static.
Signed-off-by: Guo Ren
Signed-off-by: Guo Ren
Cc: Arnd Bergmann
---
arch/riscv/include/asm/elf
From: Guo Ren
There is no vgettimeofday supported in rv32 that makes simple to
generate rv32 vdso code which only needs riscv64 compiler. Other
architectures need change compiler or -m (machine parameter) to
support vdso32 compiling. If rv32 support vgettimeofday (which
cause C compile) in future
From: Guo Ren
Implement necessary type and macro for compat elf. See the code
comment for detail.
Signed-off-by: Guo Ren
Signed-off-by: Guo Ren
Cc: Arnd Bergmann
---
arch/riscv/include/asm/elf.h | 49 +++-
1 file changed, 48 insertions(+), 1 deletion(-)
diff
From: Guo Ren
Implement the entry of compat_sys_call_table[] in asm. Ref to
riscv-privileged spec 4.1.1 Supervisor Status Register (sstatus):
BIT[32:33] = UXL[1:0]:
- 1:32
- 2:64
- 3:128
Signed-off-by: Guo Ren
Signed-off-by: Guo Ren
Cc: Arnd Bergmann
---
arch/riscv/include/asm/csr.h |
From: Guo Ren
Implement compat_syscall_table.c with compat_sys_call_table & fixup
system call such as truncate64,pread64,fallocate which need two
regs to indicate 64bit-arg (copied from arm64).
Signed-off-by: Guo Ren
Signed-off-by: Guo Ren
Cc: Arnd Bergmann
---
arch/riscv/include/asm/syscall
From: Guo Ren
Make TASK_SIZE from const to dynamic detect TIF_32BIT flag
function. Refer to arm64 to implement DEFAULT_MAP_WINDOW_64 for
efi-stub.
Limit 32-bit compatible process in 0-2GB virtual address range
(which is enough for real scenarios), because it could avoid
address sign extend probl
From: Guo Ren
Implement asm/compat.h for struct compat_xxx, RLIM_INFINITY,
OFF_T_MAX, is_compat_task, compat_user_regset, regset convert.
Signed-off-by: Guo Ren
Signed-off-by: Guo Ren
Cc: Arnd Bergmann
---
arch/riscv/include/asm/compat.h | 132 +++
arch/riscv/inc
From: Guo Ren
Let's follow the origin patch's spirit:
The only difference between rv32_defconfig and defconfig is that
rv32_defconfig has CONFIG_ARCH_RV32I=y.
This is helpful to compare rv64-compat-rv32 v.s. rv32-linux.
Fixes: 1b937e8faa87ccfb ("RISC-V: Add separate defconfig for 32bit system
From: Guo Ren
Make "uapi asm unistd.h" could be used for architectures' COMPAT
mode. The __SYSCALL_COMPAT is first used in riscv.
Signed-off-by: Guo Ren
Signed-off-by: Guo Ren
Cc: Arnd Bergmann
---
include/uapi/asm-generic/unistd.h | 4 ++--
tools/include/uapi/asm-generic/unistd.h | 4
From: Guo Ren
There are 7 64bit architectures that support Linux COMPAT mode to
run 32bit applications. A lot of definitions are duplicate:
- COMPAT_USER_HZ
- COMPAT_RLIM_INFINITY
- COMPAT_OFF_T_MAX
- __compat_uid_t, __compat_uid_t
- compat_dev_t
- compat_ipc_pid_t
- struct compat_flock
-
From: Guo Ren
Remove duplicate F_GETLK64,F_SETLK64,F_SETLKW64 definitions in
arch/*/include/asm/compat.h.
Signed-off-by: Guo Ren
Signed-off-by: Guo Ren
Cc: Arnd Bergmann
---
arch/arm64/include/asm/compat.h | 4
arch/powerpc/include/asm/compat.h | 4
arch/s390/include/asm/compat.h
From: Guo Ren
RISC-V doesn't neeed compat_stat, so using __ARCH_WANT_COMPAT_STAT
to exclude unnecessary SYSCALL functions.
Signed-off-by: Guo Ren
Signed-off-by: Guo Ren
Cc: Arnd Bergmann
---
arch/arm64/include/asm/unistd.h | 1 +
arch/mips/include/asm/unistd.h| 2 ++
arch/parisc/includ
From: Guo Ren
The existing per-arch definitions are pretty much historic cruft.
Move SYSVIPC_COMPAT into init/Kconfig.
Signed-off-by: Guo Ren
Signed-off-by: Guo Ren
Cc: Arnd Bergmann
Cc: Christoph Hellwig
---
arch/arm64/Kconfig | 4
arch/mips/Kconfig| 5 -
arch/parisc/Kconfig
ycon=sbi" -netdev user,id=net0 -device
virtio-net-device,netdev=net0
QEMU emulator version 6.2.50 (v6.2.0-29-g196d7182c8)
OpenSBI v0.9
[0.00] Linux version 5.16.0-rc6-00017-g750f87086bdd-dirty
(guoren@guoren-Z87-HD3) (riscv64-unknown-linux-gnu-gcc (GCC) 10.2.0, GNU ld
(GNU Binuti
From: Guo Ren
This macro isn't used in Linux sched, now. Delete in
include/linux/sched.h and arch's include/asm.
Signed-off-by: Guo Ren
Signed-off-by: Guo Ren
Reviewed-by: Arnd Bergmann
---
arch/mips/include/asm/processor.h | 3 ---
1 file changed, 3 deletions(-)
diff --git a/arch/mips/incl
From: Guo Ren
This macro isn't used in Linux sched, now. Delete in
include/linux/sched.h and arch's include/asm.
Signed-off-by: Guo Ren
Signed-off-by: Guo Ren
Reviewed-by: Arnd Bergmann
---
arch/arm64/include/asm/processor.h | 2 --
1 file changed, 2 deletions(-)
diff --git a/arch/arm64/inc
From: Guo Ren
This macro isn't used in Linux sched, now. Delete in
include/linux/sched.h and arch's include/asm.
Signed-off-by: Guo Ren
Signed-off-by: Guo Ren
Reviewed-by: Arnd Bergmann
---
arch/parisc/include/asm/processor.h | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --gi
From: Guo Ren
This macro isn't used in Linux sched, now. Delete in
include/linux/sched.h and arch's include/asm.
Signed-off-by: Guo Ren
Signed-off-by: Guo Ren
Reviewed-by: Arnd Bergmann
---
arch/s390/include/asm/processor.h | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git
From: Guo Ren
This macro isn't used in Linux sched, now. Delete in
include/linux/sched.h and arch's include/asm.
Signed-off-by: Guo Ren
Signed-off-by: Guo Ren
Reviewed-by: Arnd Bergmann
---
arch/powerpc/include/asm/task_size_64.h | 6 +-
1 file changed, 1 insertion(+), 5 deletions(-)
di
From: Guo Ren
This macro isn't used in Linux, now. Delete in
include/linux/sched.h and arch's include/asm.
Signed-off-by: Guo Ren
Signed-off-by: Guo Ren
Reviewed-by: Arnd Bergmann
---
arch/sparc/include/asm/processor_64.h | 3 ---
1 file changed, 3 deletions(-)
diff --git a/arch/sparc/inclu
From: Guo Ren
This macro isn't used in Linux, now. Delete in
include/linux/sched.h and arch's include/asm.
Signed-off-by: Guo Ren
Signed-off-by: Guo Ren
Reviewed-by: Arnd Bergmann
---
arch/x86/include/asm/page_64_types.h | 2 --
1 file changed, 2 deletions(-)
diff --git a/arch/x86/include/a
From: Guo Ren
This macro isn't used in Linux, now. Delete in include/linux/sched.h
and arch's include/asm. This would confuse people who are
implementing the COMPAT feature for architecture.
Here is the comment by Arnd:
Looking through the git history, I see commit a06db751c321 ("pagemap:
check
From: Guo Ren
This macro isn't used in Linux, now. Delete in include/linux/sched.h
and arch's include/asm. This would confuse people who are
implementing the COMPAT feature for architecture.
Changes in v3:
- Fixup Documentation/process/submitting-patches.rst, add sender
Signed-off-by.
Chang
From: Guo Ren
This macro isn't used in Linux sched, now. Delete in
include/linux/sched.h and arch's include/asm.
Signed-off-by: Guo Ren
Reviewed-by: Arnd Bergmann
---
arch/mips/include/asm/processor.h | 3 ---
1 file changed, 3 deletions(-)
diff --git a/arch/mips/include/asm/processor.h
b/a
From: Guo Ren
This macro isn't used in Linux sched, now. Delete in
include/linux/sched.h and arch's include/asm.
Signed-off-by: Guo Ren
Reviewed-by: Arnd Bergmann
---
arch/arm64/include/asm/processor.h | 2 --
1 file changed, 2 deletions(-)
diff --git a/arch/arm64/include/asm/processor.h
b/
From: Guo Ren
This macro isn't used in Linux sched, now. Delete in
include/linux/sched.h and arch's include/asm.
Signed-off-by: Guo Ren
Reviewed-by: Arnd Bergmann
---
arch/parisc/include/asm/processor.h | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/parisc/include/
From: Guo Ren
This macro isn't used in Linux sched, now. Delete in
include/linux/sched.h and arch's include/asm.
Signed-off-by: Guo Ren
Reviewed-by: Arnd Bergmann
---
arch/s390/include/asm/processor.h | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/s390/include/asm/
From: Guo Ren
This macro isn't used in Linux sched, now. Delete in
include/linux/sched.h and arch's include/asm.
Signed-off-by: Guo Ren
Reviewed-by: Arnd Bergmann
---
arch/powerpc/include/asm/task_size_64.h | 6 +-
1 file changed, 1 insertion(+), 5 deletions(-)
diff --git a/arch/powerpc/
From: Guo Ren
This macro isn't used in Linux, now. Delete in
include/linux/sched.h and arch's include/asm.
Signed-off-by: Guo Ren
Reviewed-by: Arnd Bergmann
---
arch/sparc/include/asm/processor_64.h | 3 ---
1 file changed, 3 deletions(-)
diff --git a/arch/sparc/include/asm/processor_64.h
b
From: Guo Ren
This macro isn't used in Linux, now. Delete in
include/linux/sched.h and arch's include/asm.
Signed-off-by: Guo Ren
Reviewed-by: Arnd Bergmann
---
arch/x86/include/asm/page_64_types.h | 2 --
1 file changed, 2 deletions(-)
diff --git a/arch/x86/include/asm/page_64_types.h
b/ar
From: Guo Ren
This macro isn't used in Linux, now. Delete in include/linux/sched.h
and arch's include/asm. This would confuse people who are
implementing the COMPAT feature for architecture.
Here is the comment by Arnd:
Looking through the git history, I see commit a06db751c321 ("pagemap:
check
From: Guo Ren
This macro isn't used in Linux, now. Delete in include/linux/sched.h
and arch's include/asm. This would confuse people who are
implementing the COMPAT feature for architecture.
Changes in v2:
- Add Arnd's comment in main patch
- Optimize coding convention with Christophe's advise
From: Guo Ren
This macro isn't used in Linux sched, now. Delete in
include/linux/sched.h and arch's include/asm.
Signed-off-by: Guo Ren
---
arch/mips/include/asm/processor.h | 3 ---
1 file changed, 3 deletions(-)
diff --git a/arch/mips/include/asm/processor.h
b/arch/mips/include/asm/process
From: Guo Ren
This macro isn't used in Linux sched, now. Delete in
include/linux/sched.h and arch's include/asm.
Signed-off-by: Guo Ren
---
arch/arm64/include/asm/processor.h | 2 --
1 file changed, 2 deletions(-)
diff --git a/arch/arm64/include/asm/processor.h
b/arch/arm64/include/asm/proce
From: Guo Ren
This macro isn't used in Linux sched, now. Delete in
include/linux/sched.h and arch's include/asm.
Signed-off-by: Guo Ren
---
arch/parisc/include/asm/processor.h | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/parisc/include/asm/processor.h
b/arch/pari
From: Guo Ren
This macro isn't used in Linux sched, now. Delete in
include/linux/sched.h and arch's include/asm.
Signed-off-by: Guo Ren
---
arch/s390/include/asm/processor.h | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/s390/include/asm/processor.h
b/arch/s390/inc
From: Guo Ren
This macro isn't used in Linux sched, now. Delete in
include/linux/sched.h and arch's include/asm.
Signed-off-by: Guo Ren
---
arch/powerpc/include/asm/task_size_64.h | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/arch/powerpc/include/asm/task_size_64.h
From: Guo Ren
This macro isn't used in Linux, now. Delete in
include/linux/sched.h and arch's include/asm.
Signed-off-by: Guo Ren
---
arch/sparc/include/asm/processor_64.h | 3 ---
1 file changed, 3 deletions(-)
diff --git a/arch/sparc/include/asm/processor_64.h
b/arch/sparc/include/asm/proc
From: Guo Ren
This macro isn't used in Linux, now. Delete in
include/linux/sched.h and arch's include/asm.
Signed-off-by: Guo Ren
---
arch/x86/include/asm/page_64_types.h | 2 --
1 file changed, 2 deletions(-)
diff --git a/arch/x86/include/asm/page_64_types.h
b/arch/x86/include/asm/page_64_t
From: Guo Ren
This macro isn't used in Linux, now. Delete in include/linux/sched.h
and arch's include/asm. This would confuse people who are
implementing the COMPAT feature for architecture.
Signed-off-by: Guo Ren
---
include/linux/sched.h | 4
1 file changed, 4 deletions(-)
diff --git a
From: Guo Ren
This macro isn't used in Linux, now. Delete in include/linux/sched.h
and arch's include/asm. This would confuse people who are
implementing the COMPAT feature for architecture.
Guo Ren (8):
sched: Remove unused TASK_SIZE_OF
sched: x86: Remove unused TASK_SIZE_OF
sched: sparc:
From: Guo Ren
We don't have native hw xchg16 instruction, so let qspinlock
generic code to deal with it.
Using the full-word atomic xchg instructions implement xchg16 has
the semantic risk for atomic operations.
This patch cancels the dependency of on qspinlock generic code on
architecture's xc
From: Guo Ren
We don't have native hw xchg16 instruction, so let qspinlock
generic code to deal with it.
Using the full-word atomic xchg instructions implement xchg16 has
the semantic risk for atomic operations.
This patch cancels the dependency of on qspinlock generic code on
architecture's xc
From: Guo Ren
We don't have native hw xchg16 instruction, so let qspinlock
generic code to deal with it.
Using the full-word atomic xchg instructions implement xchg16 has
the semantic risk for atomic operations.
This patch cancels the dependency of on qspinlock generic code on
architecture's xc
From: Guo Ren
We don't have native hw xchg16 instruction, so let qspinlock
generic code to deal with it.
Using the full-word atomic xchg instructions implement xchg16 has
the semantic risk for atomic operations.
This patch cancels the dependency of on qspinlock generic code on
architecture's xc
From: Guo Ren
Update the C-SKY port to use the generic qspinlock and qrwlock.
C-SKY only support ldex.w/stex.w with word(double word) size &
align access. So it must select XCHG32 to let qspinlock only use
word atomic xchg_tail.
Default is still ticket lock.
Signed-off-by: Guo Ren
Cc: Waiman
From: Guo Ren
- Using smp_cond_load_acquire in arch_spin_lock by Peter's
advice.
- Using __smp_acquire_fence in arch_spin_trylock
- Using smp_store_release in arch_spin_unlock
All above are just coding conventions and won't affect the
function.
TODO in smp_cond_load_acquire for architectu
From: Guo Ren
This patch introduces a ticket lock implementation for riscv, along the
same lines as the implementation for arch/arm & arch/csky.
We still use qspinlock as default.
Signed-off-by: Guo Ren
Cc: Peter Zijlstra
Cc: Anup Patel
Cc: Arnd Bergmann
---
arch/riscv/Kconfig
From: Michael Clark
Update the RISC-V port to use the generic qspinlock and qrwlock.
This patch requires support for xchg_xtail for full-word which
are added by a previous patch:
Guo added select ARCH_USE_QUEUED_SPINLOCKS_XCHG32 in Kconfig
Guo fixed up compile error which made by below include
From: Guo Ren
Some architectures don't have sub-word swap atomic instruction,
they only have the full word's one.
The sub-word swap only improve the performance when:
NR_CPUS < 16K
* 0- 7: locked byte
* 8: pending
* 9-15: not used
* 16-17: tail index
* 18-31: tail cpu (+1)
The 9-15 b
From: Guo Ren
Current riscv is still using baby spinlock implementation. It'll cause
fairness and cache line bouncing problems. Many people are involved
and pay the efforts to improve it:
- The first version of patch was made in 2019.1:
https://lore.kernel.org/linux-riscv/20190211043829.300
From: Guo Ren
We don't have native hw xchg16 instruction, so let qspinlock
generic code to deal with it.
Using the full-word atomic xchg instructions implement xchg16 has
the semantic risk for atomic operations.
This patch cancels the dependency of on qspinlock generic code on
architecture's xc
From: Guo Ren
We don't have native hw xchg16 instruction, so let qspinlock
generic code to deal with it.
Using the full-word atomic xchg instructions implement xchg16 has
the semantic risk for atomic operations.
This patch cancels the dependency of on qspinlock generic code on
architecture's xc
From: Guo Ren
We don't have native hw xchg16 instruction, so let qspinlock
generic code to deal with it.
Using the full-word atomic xchg instructions implement xchg16 has
the semantic risk for atomic operations.
This patch cancels the dependency of on qspinlock generic code on
architecture's xc
From: Guo Ren
We don't have native hw xchg16 instruction, so let qspinlock
generic code to deal with it.
Using the full-word atomic xchg instructions implement xchg16 has
the semantic risk for atomic operations.
This patch cancels the dependency of on qspinlock generic code on
architecture's xc
From: Guo Ren
Update the C-SKY port to use the generic qspinlock and qrwlock.
C-SKY only support ldex.w/stex.w with word(double word) size &
align access. So it must select XCHG32 to let qspinlock only use
word atomic xchg_tail.
Signed-off-by: Guo Ren
Cc: Waiman Long
Cc: Peter Zijlstra
Cc: W
From: Michael Clark
Update the RISC-V port to use the generic qspinlock and qrwlock.
This patch requires support for xchg_xtail for full-word which
are added by a previous patch:
Guo added select ARCH_USE_QUEUED_SPINLOCKS_XCHG32 in Kconfig
Guo fixed up compile error which made by below include
From: Guo Ren
Some architectures don't have sub-word swap atomic instruction,
they only have the full word's one.
The sub-word swap only improve the performance when:
NR_CPUS < 16K
* 0- 7: locked byte
* 8: pending
* 9-15: not used
* 16-17: tail index
* 18-31: tail cpu (+1)
The 9-15 b
From: Guo Ren
Current riscv is still using baby spinlock implementation. It'll cause
fairness and cache line bouncing problems. Many people are involved
and pay the efforts to improve it:
- The first version of patch was made in 2019.1:
https://lore.kernel.org/linux-riscv/20190211043829.300
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