Signed-off-by: Sukadev Bhattiprolu
---
MAINTAINERS | 2 --
1 file changed, 2 deletions(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index 61d9f114c37f..cf96ac858cc3 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -9336,14 +9336,12 @@ F: drivers/pci/hotplug/rpaphp*
IBM Power SRIOV Virtual NIC
> Definitely looks like it, the disassembly is:
>
> not r9,r9
> clrldi r3,r9,63
> blr # end of previous function
> nop
> addis r2,r12,491 # function entry
> addir2,r2,14816
> stdur1,-48(r1) # stack frame creation
> li
he system under that heavy load created by
> HTX stress test, which can tear down any working system.
We need to talk to capacity planning and test architects about that,
but all I want to know is what hard reset would do differently to
fix this communication error with VIOS.
Sukadev
irmation on that. git history has not been helpful.
While there are other rough edges around do_reset() that we are
working on fixing separately (eg: ignore the error return from
__ibmvnic_close() right above this change) I see a benefit to
the customer with this patch.
I am not convinced we should perform a hard reset just because
the link down failed.
Sukadev
5413:1-18:
> ERROR: nested lock+irqsave that reuses flags from line 5404.
>
Thanks. Please add
Fixes: 4a41c421f367 ("ibmvnic: serialize access to work queue on remove")
> Signed-off-by: Junlin Yang
Reviewed-by: Sukadev Bhattiprolu
a false positive. However, there is no reason to
> not initialize the variables unconditionally avoiding the warning.
Yeah, its a false positive, but initializing doesn't hurt.
>
> Fixes: 635e442f4a48 ("ibmvnic: merge ibmvnic_reset_init and ibmvnic_init")
> Signed-off-by: Michal Suchanek
Reviewed-by: Sukadev Bhattiprolu
* event.
*/
if (ops->ndo_stop)
ops->ndo_stop(dev);
Sukadev
if (adapter->state == VNIC_REMOVING ||
> > > - adapter->state == VNIC_REMOVED) {
> > > + if (adapter->state == VNIC_REMOVED) {
If the adapter is in REMOVING state, there is no point going
through the reset process. We could just bail out here. We
s
return vas_scom_write(chip, VAS_MISC_N_CTL, val);
}
I am copying Bulent Albali and Haren Myneni who have been working with
VAS/NX for their thoughts/experience.
> >
>
> Maybe ask Sukadev who did the implementation and is maintaining it ?
>
> > I do have t
ove the
line (and the comment block above it)? Or does it help to clear the event
count in ->start_txn() rather than on read()?
How does the change impact the counts when run without the -I?
Thanks for chasing this down.
Sukadev
>From 72a7497a8673c93a4b80aa4fc38b88a8e90aa650 Mon Sep 17 00:00:00 2001
From: Sukadev Bhattiprolu
Date: Wed, 22 Jan 2020 18:57:18 -0600
Subject: [PATCH 1/1] powerpc/xmon: Fix compile error in print_insn* functions
Fix couple of compile errors I stumbled upon with CONFIG_XMON=y
Use FW_FEATURE_SVM to detect a secure guest (SVM). This would be
more efficient than calling mfmsr() frequently.
Suggested-by: Michael Ellerman
Signed-off-by: Sukadev Bhattiprolu
---
arch/powerpc/include/asm/firmware.h | 3 ++-
arch/powerpc/include/asm/svm.h| 6 +-
arch
mechanisms in Ultravisor. Some features,
like BHRB or monitoring event counts in HV-mode (e.g: perf stat -e cycles:h)
may still be restricted for the longer term.
Signed-off-by: Sukadev Bhattiprolu
Acked-by: Madhavan Srinivasan
---
Changelog[v4]
- [Paul Mackerras] Drop is_secure_guest() checks
Use FW_FEATURE_SVM to detect a secure guest (SVM). This would be
more efficient than calling mfmsr() frequently.
Suggested-by: Michael Ellerman
Signed-off-by: Sukadev Bhattiprolu
---
arch/powerpc/include/asm/firmware.h | 3 ++-
arch/powerpc/include/asm/svm.h| 6 +-
arch
Ultravisor disables some CPU features like BHRB, EBB and PMU in
secure virtual machines (SVMs). Skip accessing those registers
in SVMs to avoid getting a Program Interrupt.
Signed-off-by: Sukadev Bhattiprolu
Acked-by: Madhavan Srinivasan
---
Changelog[v2]
- [Michael Ellerman] Optimize
ight? - bc SVMs cannot access PMU registers.
>
> Rest looks good.
> Acked-by: Madhavan Srinivasan
Cool, Thanks,
Sukadev
>From 91a77dbea3c909ff15c66cded37f1334304a293d Mon Sep 17 00:00:00 2001
From: Sukadev Bhattiprolu
Date: Mon, 6 Jan 2020 13:50:02 -0600
Subject: [PATCH 1/1] powerpc/xmon: don't access ASDR in VMs
ASDR is HV-privileged and must only be accessed in HV-mode.
Fixes a Program Check (0x700) w
0:00:00 2001
From: Sukadev Bhattiprolu
Date: Fri, 27 Sep 2019 14:30:36 -0500
Subject: [PATCH 2/2] KVM: PPC: Implement H_SVM_INIT_ABORT hcall
Implement the H_SVM_INIT_ABORT hcall which the Ultravisor can use to
abort an SVM after it has issued the H_SVM_INIT_START and before the
H_SVM_INIT_DONE
It should also return H_UNSUPPORTED when
> (kvm->arch.secure_guest & KVMPPC_SECURE_INIT_DONE) is true.
If KVMPPC_SECURE_INIT_DONE is set, KVMPPC_SECURE_INIT_START is also
set - we never clear KVMPPC_SECURE_INIT_START right?
Sukadev
Sukadev Bhattiprolu [suka...@linux.ibm.com] wrote:
> Ultravisor disables some CPU features like BHRB, EBB and PMU in
> secure virtual machines (SVMs). Skip accessing those registers
> in SVMs to avoid getting a Program Interrupt.
Here is an updated patch that explicitly includes in
in s
Ultravisor disables some CPU features like BHRB, EBB and PMU in
secure virtual machines (SVMs). Skip accessing those registers
in SVMs to avoid getting a Program Interrupt.
Signed-off-by: Sukadev Bhattiprolu
---
Changelog[v2]
- [Michael Ellerman] Optimize the code using FW_FEATURE_SVM
Use FW_FEATURE_SVM to detect a secure guest (SVM). This would be
more efficient than calling mfmsr() frequently.
Suggested-by: Michael Ellerman
Signed-off-by: Sukadev Bhattiprolu
---
arch/powerpc/include/asm/firmware.h | 3 ++-
arch/powerpc/include/asm/svm.h| 6 +-
arch
Add 'skip_page_out' parameter to kvmppc_uvmem_drop_pages() so the
callers can specify whetheter or not to skip paging out pages. This
will be needed in a follow-on patch that implements H_SVM_INIT_ABORT
hcall
Reviewed-by: Paul Mackerras
Signed-off-by: Sukadev Bhattiprolu
---
ar
Bharata Rao.
Signed-off-by: Ram Pai
Signed-off-by: Sukadev Bhattiprolu
Signed-off-by: Bharata B Rao
---
Changelog[v4]:
- [Bharata Rao] Add missing rcu locking
- [Paul Mackerras] simplify code that walks memslots
- Add a check to ensure that H_SVM_INIT_ABORT is called
Paul Mackerras [pau...@ozlabs.org] wrote:
> On Sat, Dec 14, 2019 at 06:12:08PM -0800, Sukadev Bhattiprolu wrote:
> >
> > Implement the H_SVM_INIT_ABORT hcall which the Ultravisor can use to
> > abort an SVM after it has issued the H_SVM_INIT_START and before the
> > H
Bharata B Rao [bhar...@linux.ibm.com] wrote:
> On Sat, Dec 14, 2019 at 06:12:08PM -0800, Sukadev Bhattiprolu wrote:
> > +unsigned long kvmppc_h_svm_init_abort(struct kvm *kvm)
> > +{
> > + int i;
> > +
> > + if (!(kvm->arch.secure_guest & KVMPPC_SE
t;
> If the Ultravisor is going to disable EBB and BHRB then we need new
> CPU_FTR bits for those, and the code that accesses those registers
> needs to be put behind cpu_has_feature(EBB) etc.
Will try the cpu_has_feature(). Would it be ok to use a single feature
bit, like UV or make it per-register group as that could need more
feature bits?
Thanks,
Sukadev
n the bare-metal HV the syscall and performance counters work
Signed-off-by: Sukadev Bhattiprolu
---
arch/powerpc/kernel/cpu_setup_power.S | 22 ++
arch/powerpc/perf/core-book3s.c | 6 ++
2 files changed, 28 insertions(+)
diff --git a/arch/powerpc/kernel/cpu_setup_
Ultravisor disables some CPU features like EBB and BHRB in the HFSCR
for secure virtual machines (SVMs). If the SVMs attempt to access
related registers, they will get a Program Interrupt.
Use macros/wrappers to skip accessing EBB and BHRB registers in secure
VMs.
Signed-off-by: Sukadev
and
Bharata Rao.
Signed-off-by: Ram Pai
Signed-off-by: Sukadev Bhattiprolu
Signed-off-by: Bharata B Rao
---
Changelog[v3]:
- Rather than pass the NIP/MSR as parameters, load them into
SRR0/SRR1 (like we do with other registers) and terminate
the VM after paging out
This patch is based on Bharata's v11 KVM patches for secure guests:
https://lists.ozlabs.org/pipermail/linuxppc-dev/2019-November/200918.html
---
From: Sukadev Bhattiprolu
Date: Fri, 13 Dec 2019 15:06:16 -0600
Subject: [PATCH V3 1/2] KVM: PPC: Add skip_page_out parameter
Add 'ski
This patch is based on Bharata's v11 KVM patches for secure guests:
https://lists.ozlabs.org/pipermail/linuxppc-dev/2019-November/200918.html
---
>From c0826bac72a658312f3d87e0bb18ecaf08ac2b2e Mon Sep 17 00:00:00 2001
From: Sukadev Bhattiprolu
Date: Fri, 27 Sep 2019 14:30:36 -0500
ed-off-by: Claudio Carvalho
Except for one question in Patch 2, the patch series looks good to me.
Reviewed-by: Sukadev Bhattiprolu
> +unsigned long kvmppc_h_svm_init_done(struct kvm *kvm)
> +{
> + if (!(kvm->arch.secure_guest & KVMPPC_SECURE_INIT_START))
Minor: Should we also check if KVMPPC_SECURE_INIT_DONE is set here (since
both can be set)?
> A secure guest will share some of its pages with hypervisor (Eg. virtio
> bounce buffers etc). Support sharing of pages between hypervisor and
> ultravisor.
A brief note about what a shared page is would help (a page belonging
to the SVM but in normal memory and with decrypted contents)? Eithe
In the subject line s/Movement of/Move/? Some minor comments below.
Bharata B Rao [bhar...@linux.ibm.com] wrote:
> Manage migration of pages betwen normal and secure memory of secure
> guest by implementing H_SVM_PAGE_IN and H_SVM_PAGE_OUT hcalls.
>
> H_SVM_PAGE_IN: Move the content of a norma
ONE)
> - Release all device pages of the secure guest.
>
> After these steps, guest is ready to issue UV_ESM call once again
> to switch to secure mode.
>
> Signed-off-by: Bharata B Rao
> Signed-off-by: Sukadev Bhattiprolu
> [Implementation of uv_svm_terminate() and
can
> use to request certain pages to be made accessible (aka shared).
I would like to piggy-back on this series (since it provides the
context) to add another patch we need for SVMs :-)
Appreciate any comments.
---
>From ed93a0e36ec886483a72fdb8d99380bbe6607f37 Mon Sep 17 00:00:00 2
Bharata B Rao [bhar...@linux.ibm.com] wrote:
> On Wed, Aug 28, 2019 at 08:02:19PM -0700, Sukadev Bhattiprolu wrote:
> > Some minor comments/questions below. Overall, the patches look
> > fine to me.
> >
> > > +#include
> > > +#include
> > > +
> - After the guest becomes secure, when we handle a page fault of a page
> belonging to SVM in HV, send that page to UV via UV_PAGE_IN.
> - Whenever a page is unmapped on the HV side, inform UV via UV_PAGE_INVAL.
> - Ensure all those routines that walk the secondary page tables of
> the guest
> A secure guest will share some of its pages with hypervisor (Eg. virtio
> bounce buffers etc). Support sharing of pages between hypervisor and
> ultravisor.
>
> Once a secure page is converted to shared page, the device page is
> unmapped from the HV side page tables.
>
> Signed-off-by: Bharata
Some minor comments/questions below. Overall, the patches look
fine to me.
> +#include
> +#include
> +#include
> +#include
> +
> +static struct dev_pagemap kvmppc_devm_pgmap;
> +static unsigned long *kvmppc_devm_pfn_bitmap;
> +static DEFINE_SPINLOCK(kvmppc_devm_pfn_lock);
Is this lock protect
t have access, therefore, we have
> > +* to do a ucall to set an entry.
> > +*/
> > + if (firmware_has_feature(FW_FEATURE_ULTRAVISOR)) {
> > + uv_register_pate(lpid, dw0, dw1);
> > + pr_info("PATE registered by ultravisor: dw0 = 0x%lx, dw1 =
> > 0x%lx\n",
> > + dw0, dw1);
> > + } else {
> > + flush_partition(lpid, old);
> > + }
>
> What is different is whether we flush or not.
only differences are where the partition table used by hardware is stored
(secure memory) and updated (in UV, with higher privilege).
>
> And don't we still need to do the flush for the nestMMU? I assume we're
> saying the ultravisor will broadcast a flush for us, which will also
> handle the nestMMU case?
The same sequence of instructions (as HV) are used in uv_register_pate()
to flush partition and process scoped entries (so nest MMU would also be
covered when NMMU sees the tlbie?)
Thanks,
Sukadev
Michael Ellerman [m...@ellerman.id.au] wrote:
> Claudio Carvalho writes:
> > From: Sukadev Bhattiprolu
> >
> > To enter a secure guest, we have to go through the ultravisor, therefore
> > we do a ucall when we are entering a secure guest.
> >
> > This ch
The file arch/powerpc/include/uapi/asm/vas.h was considered but
never merged and should be removed from the MAINTAINERS file.
While here, add missing email address.
Reported-by: Joe Perches
Signed-off-by: Sukadev Bhattiprolu
---
MAINTAINERS | 3 +--
1 file changed, 1 insertion(+), 2
Andrew Donnellan [andrew.donnel...@au1.ibm.com] wrote:
> [+ Sukadev, Christophe]
>
> On 18/04/18 11:08, Alastair D'Silva wrote:
> > From: Alastair D'Silva
> >
> > The current implementation of TID allocation, using a global IDR, may
> > result
://github.com/sukadev/linux/ p9-json-v5
for you to fetch changes up to 99c9dff949f2502964005f9afa8d60c89b446f2c:
perf vendor events: Update POWER9 events (2018-03-13 16:48:12 -0500)
Sukadev Bhattiprolu (1):
perf vendor events
From: Sukadev Bhattiprolu
Date: Fri, 9 Feb 2018 11:49:06 -0600
Subject: [PATCH 1/1] powerpc/vas: Fix cleanup when VAS is not configured
When VAS is not configured, unregister the platform driver. Also simplify
cleanup by delaying vas debugfs init until we know VAS is configured.
Signed-off-by
Michael Ellerman [m...@ellerman.id.au] wrote:
> Sukadev Bhattiprolu writes:
>
> > When VAS is not configured in the system, make sure to remove
> > the VAS debugfs directory and unregister the platform driver.
> >
> > Signed-off-by: Sukadev Bhattiprolu
>
ight?
If VM_DONCOPY is set, then we can clear it.
>
> Cc: Sukadev Bhattiprolu
> Signed-off-by: Nicholas Piggin
Reviewed-by: Sukadev Bhattiprolu
Add a couple of trace points in the VAS driver
Signed-off-by: Sukadev Bhattiprolu
---
Changelog [v2]
- Make TRACE_INCLUDE_PATH relative to
---
arch/powerpc/platforms/powernv/vas-trace.h | 112
arch/powerpc/platforms/powernv/vas-window.c | 9 +++
2 files
Remove a bogus line from arch/powerpc/platforms/powernv/Makefile that
was added by commit ece4e51 ("powerpc/vas: Export HVWC to debugfs").
Signed-off-by: Sukadev Bhattiprolu
---
arch/powerpc/platforms/powernv/Makefile | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/powerpc
When VAS is not configured in the system, make sure to remove
the VAS debugfs directory and unregister the platform driver.
Signed-off-by: Sukadev Bhattiprolu
---
arch/powerpc/platforms/powernv/vas-debug.c | 5 +
arch/powerpc/platforms/powernv/vas.c | 5 -
arch/powerpc/platforms
Fix the order of cleanup to ensure we free the name buffer in case
of an error creating 'hvwc' or 'info' files.
Signed-off-by: Sukadev Bhattiprolu
---
arch/powerpc/platforms/powernv/vas-debug.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/ar
I agree with your other comments as well and will send a new version.
Thanks for the detailed review.
Sukadev
; + break;
> > + }
>
> return -EINVAL;
> > +}
>
> Do you expect to implement more ioctls? If not, just change the switch to
> an if ().
Maybe a couple more but changed it to an 'if' for now (and fixed an
error handling issue in ftw_file_init()
file.
Ok. Here is the updated patch.
Thanks for the review.
Sukadev
---
>From 1f347c199a0b1bbc528705c8e9ddd11c825a80fc Mon Sep 17 00:00:00 2001
From: Sukadev Bhattiprolu
Date: Thu, 2 Feb 2017 06:20:07 -0500
Subject: [PATCH 2/5] powerpc/ftw: Define FTW_SETUP ioctl API
Define the FTW_SETUP ioc
reference counter.
Yes the FTW driver avoids calling clear_thread_tidr() for the same reasons.
I don't have a strong case for exporting clear_thread_tidr(). Here is the
updated patch, exporting just the set_thread_tidr().
Thanks,
Sukadev
---
>From 204ee3c918f8dad46c1e40d2d3730b07c10a87a3 Mon
Document the usage of the VAS Fast thread-wakeup API and add an entry in
MAINTAINERS file.
Thanks for input/comments from Benjamin Herrenschmidt, Michael Neuling,
Michael Ellerman, Robert Blackmore, Ian Munsie, Haren Myneni and Paul
Mackerras.
Signed-off-by: Sukadev Bhattiprolu
---
Changelog
Add a couple of trace points in the FTW driver
Signed-off-by: Sukadev Bhattiprolu
---
drivers/misc/ftw/ftw-trace.h | 75
drivers/misc/ftw/ftw.c | 6
2 files changed, 81 insertions(+)
create mode 100644 drivers/misc/ftw/ftw-trace.h
diff
/wake up.
PATCH 5/5 documents the API and includes an example of the usage.
Signed-off-by: Sukadev Bhattiprolu
---
Changelog[v2]
- [Michael Neuling] Rename from drop "nx" from name "nx-ftw".
- [Michael Neuling] Use a single VAS_FTW_SETUP ioctl to simplify
in
Define the FTW_SETUP ioctl interface for fast thread wakeup (FTW). A
follow-on patch will implement the FTW driver and ioctl.
Thanks to input from Ben Herrenschmidt, Michael Neuling, Michael Ellerman.
Signed-off-by: Sukadev Bhattiprolu
---
Changelog[v2]
- [Michael Neuling] Use a single
Remove a bogus line from arch/powerpc/platforms/powernv/Makefile that
was added by commit ece4e51 ("powerpc/vas: Export HVWC to debugfs").
Signed-off-by: Sukadev Bhattiprolu
---
arch/powerpc/platforms/powernv/Makefile | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/powerpc
https://github.com/sukadev/linux/tree/ftw-next
Thanks to input from Ben Herrenschmidt, Michael Ellerman, Michael
Neuling and Robert Blackmore.
Sukadev Bhattiprolu (5):
powerpc/vas: Remove a stray line in Makefile
powerpc/ftw: Define FTW_SETUP ioctl API
powerpc/ftw: Implement a si
Add a couple of trace points in the VAS driver.
Signed-off-by: Sukadev Bhattiprolu
---
arch/powerpc/platforms/powernv/vas-trace.h | 112
arch/powerpc/platforms/powernv/vas-window.c | 9 +++
2 files changed, 121 insertions(+)
create mode 100644 arch/powerpc
Signed-off-by: Sukadev Bhattiprolu
---
arch/powerpc/kernel/process.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c
index f20c1ad..d22055b 100644
--- a/arch/powerpc/kernel/process.c
+++ b/arch/powerpc/kernel/process.c
@@ -1475,6
Export set_thread_tidr() and clear_thread_tidr() interfaces so they
can be used by external modules.
Signed-off-by: Sukadev Bhattiprolu
---
arch/powerpc/kernel/process.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c
index
occur.
Signed-off-by: Michael Neuling
Signed-off-by: Sukadev Bhattiprolu
---
Changelog[v4]:
- We need to disable pagefaults after all when modifying the thread
reconfig registers. Use a mutex, rather than a spinlock around
the thread reconfig registers. Acquire the
Fix the order of cleanup to ensure we free the name buffer in case
of an error creating 'hvwc' or 'info' files.
Signed-off-by: Sukadev Bhattiprolu
---
arch/powerpc/platforms/powernv/vas-debug.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/ar
From: Sukadev Bhattiprolu
Date: Tue, 28 Nov 2017 13:39:43 -0600
Subject: [PATCH 1/1]: powerpc: block interrupts when updating TIDR
clear_thread_tidr() is called in interrupt context as a part of delayed
put of the task structure (i.e as a part of timer interrupt). To prevent
a deadlock, block
return 0;
> + } else {
> + return rc;
> + }
We can eliminate the 'else' and be consistent with existing code, if
we check for error (i.e rc < 0) and return rc. assign_thread_tidr() will
not return 0, but even if it did, setting the register and thread.tidr
to 0 should not be a problem.
Sukadev
>From 958f8db089f4b89407fc4b89bccd3eaef585aa96 Mon Sep 17 00:00:00 2001
From: Sukadev Bhattiprolu
Date: Mon, 20 Nov 2017 12:53:15 -0600
Subject: [PATCH 1/1] powerpc/vas, export chip_to_vas_id()
Export the symbol chip_to_vas_id() to fix a build failure when
CONFIG_CRYPTO_DEV_NX_COMPRESS_POWERN
://github.com/sukadev/linux p9-json-v4
for you to fetch changes up to 4afb062d7d306bf56dbae9b5291e3515ccfede4c:
perf vendor events powerpc: Update POWER9 events (2017-11-08 18:42:03 -0500)
Sukadev Bhattiprolu (1):
perf vendor
Add support for user space receive window (for the Fast thread-wakeup
coprocessor type)
Signed-off-by: Sukadev Bhattiprolu
---
Changelog[v3]
- [Nick Piggin] Drop CP_ABORT since set_thread_uses_vas() does
that now (in earlier patch) and add a check for return value.
---
arch
te
address into their address space and then use copy and paste instructions
to submit the CRBs to the NX engine.
Note that kernel drivers will use vas_paste_crb() directly and don't need
this interface.
Signed-off-by: Sukadev Bhattiprolu
---
arch/powerpc/include/asm/vas.h | 7 +
refers to this system-wide unique id as a Partition Send
Window ID which is expected to be used during fault handling. Hence the
"pswid" in the function names.
Signed-off-by: Sukadev Bhattiprolu
---
arch/powerpc/include/asm/vas.h | 5 +
arch/powerpc/platforms/powernv/va
occur.
Cc: Aneesh Kumar K.V
Signed-off-by: Michael Neuling
Signed-off-by: Sukadev Bhattiprolu
---
Changlog[v3]:
- [Michael Ellerman] We don't need to disable/enable pagefaults
when emulating paste;
- [Michael Ellerman, Aneesh Kumar] Fix retval from emulate_paste(
as(), that VAS can use to indicate
that the current process opened a send window. During context switch,
issue CP_ABORT only for processes that have the flag set.
Thanks for input from Nick Piggin, Michael Ellerman.
Cc: Nicholas Piggin
Signed-off-by: Sukadev Bhattiprolu
---
Changelog[v3]:
: Sukadev Bhattiprolu
Signed-off-by: Philippe Bergheaud
Signed-off-by: Christophe Lombard
---
Changelog[v3]
- Merge changes with and address comments to Christophe's patch.
(i.e drop CONFIG_PPC_VAS; use CONFIG_PPC64; check CPU_ARCH_300
before setting TIDR). Defer foll
Have the COPY/PASTE instructions depend on CONFIG_BOOK3S_64 rather than
CONFIG_PPC_STD_MMU_64.
Signed-off-by: Sukadev Bhattiprolu
---
arch/powerpc/kernel/process.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel
nly relevant to a receive window so we were
not setting it for a send window (which is is paired to a receive window
anyway). But to simplify reporting in debugfs, set the 'cop' field for the
send window also.
Signed-off-by: Sukadev Bhattiprolu
---
Changelog[v3]:
- [Michael Ellerman]
useful if a thread running on one chip wants to open
a window on another chip (like the NX-842 driver does during start up).
Signed-off-by: Sukadev Bhattiprolu
---
arch/powerpc/include/asm/vas.h | 9 +
arch/powerpc/platforms/powernv/vas.c | 11 +++
drivers/crypto/nx/nx-842
Create a cpu to vasid mapping so callers can specify -1 instead of
trying to find a VAS id.
Changelog[v2]
[Michael Ellerman] Use per-cpu variables to simplify code.
Signed-off-by: Sukadev Bhattiprolu
---
arch/powerpc/platforms/powernv/vas.c | 14 +-
1 file changed, 13
Normally, the NX driver waits for the CRBs to be processed before closing
the window. But it is better to ensure that the credits are returned before
the window gets reassigned later.
Signed-off-by: Sukadev Bhattiprolu
---
arch/powerpc/platforms/powernv/vas-window.c | 45
Save the configured max window credits for a window in the vas_window
structure. We will need this when polling for return of window credits.
Signed-off-by: Sukadev Bhattiprolu
---
arch/powerpc/platforms/powernv/vas-window.c | 6 --
arch/powerpc/platforms/powernv/vas.h| 1 +
2 files
A VAS window is normally in "busy" state for only a short duration.
Reduce the time we wait for the window to go to "not-busy" state to
speed-up vas_win_close() a bit.
Signed-off-by: Sukadev Bhattiprolu
---
arch/powerpc/platforms/powernv/vas-window.c | 10 ++---
Polling for window cast out is listed in the spec, but turns out that
it is not strictly necessary and slows down window close. Making it a
stub for now.
Signed-off-by: Sukadev Bhattiprolu
---
arch/powerpc/platforms/powernv/vas-window.c | 34 ++---
1 file changed, 17
Use a helper to have the hardware unpin and mark a window closed.
Signed-off-by: Sukadev Bhattiprolu
---
arch/powerpc/platforms/powernv/vas-window.c | 22 +++---
1 file changed, 15 insertions(+), 7 deletions(-)
diff --git a/arch/powerpc/platforms/powernv/vas-window.c
b/arch
Clean up vas.h and the debug code around ifdef vas_debug.
Signed-off-by: Sukadev Bhattiprolu
---
Changelog[v3]
- Minor tweak to a debug message
---
arch/powerpc/platforms/powernv/vas-window.c | 8 +++--
arch/powerpc/platforms/powernv/vas.h| 54 ++---
2
NX-842, the only user of VAS, sets the window credits to default values
but VAS should check the credits against the possible max values.
The VAS_WCREDS_MIN is not needed and can be dropped.
Signed-off-by: Sukadev Bhattiprolu
---
arch/powerpc/platforms/powernv/vas-window.c | 6 ++
arch
Initialize a few missing window context fields from the window attributes
specified by the caller. These fields are currently set to their default
values by the caller (NX-842), but would be good to apply them anyway.
Signed-off-by: Sukadev Bhattiprolu
---
arch/powerpc/platforms/powernv/vas
ng (1):
powerpc: Emulate paste instruction
Sukadev Bhattiprolu (17):
powerpc/vas: init missing fields from [rt]xattr
powerpc/vas: Validate window credits
powerpc/vas: Cleanup some debug code
powerpc/vas: Drop poll_window_cast_out().
powerpc/vas: Use helper to unpin/close window
powerpc/vas: R
Add support for user space receive window (for the Fast thread-wakeup
coprocessor type)
Signed-off-by: Sukadev Bhattiprolu
---
arch/powerpc/platforms/powernv/vas-window.c | 59 +
1 file changed, 52 insertions(+), 7 deletions(-)
diff --git a/arch/powerpc/platforms
refers to this system-wide unique id as a Partition Send
Window ID which is expected to be used during fault handling. Hence the
"pswid" in the function names.
Signed-off-by: Sukadev Bhattiprolu
---
arch/powerpc/include/asm/vas.h | 5 +
arch/powerpc/platforms/powernv/va
te
address into their address space and then use copy and paste instructions
to submit the CRBs to the NX engine.
Note that kernel drivers will use vas_paste_crb() directly and don't need
this interface.
Signed-off-by: Sukadev Bhattiprolu
---
arch/powerpc/include/asm/vas.h | 7 +
occur.
Signed-off-by: Michael Neuling
Signed-off-by: Sukadev Bhattiprolu
---
Edit by Sukadev: Use PPC_PASTE() rather than the paste instruction since
in older versions the instruction required a third parameter.
---
arch/powerpc/include/asm/emulated_ops.h | 1 +
arch/powerpc/include/as
as(), that VAS can use to indicate
that the current process opened a send window. During context switch,
issue CP_ABORT only for processes that have the flag set.
Thanks for input from Nick Piggin, Michael Ellerman.
Signed-off-by: Sukadev Bhattiprolu
---
arch/powerpc/include/asm/processor.h |
: Sukadev Bhattiprolu
Signed-off-by: Philippe Bergheaud
Signed-off-by: Christophe Lombard
---
Changelog[v3]
- Merge changes with and address comments to Christophe's patch.
(i.e drop CONFIG_PPC_VAS; use CONFIG_PPC64; check CPU_ARCH_300
before setting TIDR). Defer foll
Have the COPY/PASTE instructions depend on CONFIG_BOOK3S_64 rather than
CONFIG_PPC_STD_MMU_64.
Signed-off-by: Sukadev Bhattiprolu
---
arch/powerpc/kernel/process.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel
nly relevant to a receive window so we were
not setting it for a send window (which is is paired to a receive window
anyway). But to simplify reporting in debugfs, set the 'cop' field for the
send window also.
Signed-off-by: Sukadev Bhattiprolu
---
arch/powerpc/platforms/powernv/Makef
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