to use the PCI Read Multiple
command, instead of the PCI Read Line command, for PCI read operations.
Please be aware that this setting may result in read pre-fetching on
some platforms.
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David Hawkins wrote:
Ira will add your comment to the body of the code near
the PRC_RM command and submit a new patch.
I'd rather have it near the top where people can see it.
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in performance with this patch. The dmatest
driver was also used to verify the correctness of the transfers, and showed
no errors.
Signed-off-by: Ira W. Snyder i...@ovro.caltech.edu
Acked-by: Timur Tabi ti...@freescale.com
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for PCI, so it would
be surprising if it had any effect elsewhere.
Surely you wouldn't really be surprised by incorrect documentation of
our parts. :-)
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going to have to study the DMA programming model,
and my device driver, and write a brand new driver from scratch.
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in
the kernel is because we didn't have a better place to put them.
Keeping them in the kernel repository was just convenient.
So I personally don't consider the *location* of the DTS files to be a
basis for deciding what they really mean.
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(for lack of a better word).
We should *strive* to maintain backwards compatibility. If that means
adding a few lines of isolated code every now and then, I don't see that
as a bad thing at all.
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an effort to minimize the problem. Adding a few isolated lines of
code to maintain that compatibility, and running a few tests, is not a
bad idea and can save headaches for some people in the future.
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.
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all of the + offset usages.
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Scott Wood wrote:
Timur Tabi wrote:
these two are related and seem like we could look for fsl,cpm2
That's okay, as long as you don't break compatibility with older
device trees that don't have that property, unless you can demonstrate
that these trees would never work with the current
patches before that broke backwards compatibility unnecessarily.
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property
anymore.
In that case, I have no issues.
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this, and so SATA
support on the 8610 HPCD is broken.
The original quirk function disabled INTx because it caused some other
interrupt problem during early development on this board, but no one remembers
any more what that problem was, and it doesn't seem to occur any more.
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,
which is how ISA DMA is frequently used.
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. And thanks to everyone for
helping me resolve this issue.
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define some property in
the device tree to handle this?
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, but
it doesn't. Earlier U-Boot couldn't find my SATA drive, so I thought
that was a clue. The latest U-Boot does find the SATA drive, but the
Linux driver still doesn't get interrupts.
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On Tue, Apr 7, 2009 at 9:09 PM, Michael Ellerman mich...@ellerman.id.au wrote:
Have you confirmed that INTX is disabled before that call?
How do I do that?
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Tejun Heo wrote:
Running lspci -nnvvvxxx before loading the driver should be enough.
That might be difficult. My root file system is on my SATA drive.
It'll be a while before I can build an NFS rootfs.
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Tejun Heo wrote:
Yeah, right. The following patch should do the trick then.
Thanks, I appreciate it. I get this output:
XXX PCI_COMMAND=0x407
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On Wed, Apr 8, 2009 at 4:31 PM, Tejun Heo t...@kernel.org wrote:
Hmmm... for now,
I think it would be best to revert the original change. Jeff, can you
please do that?
Actually, give me a few days before you do that. A colleague gave me
some suggestions to debug this.
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On Tue, Apr 7, 2009 at 7:52 PM, Michael Ellerman mich...@ellerman.id.au wrote:
Can you post some more details, or point us at a thread?
http://marc.info/?t=12391165216r=1w=2
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avoront...@ru.mvista.com
---
Acked-by: Timur Tabi ti...@freescale.com
Mark and Takashi: this patch is a must-fix for 2.6.30
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On Mon, Mar 23, 2009 at 3:07 AM, rizwan ahmad rizwan...@gmail.com wrote:
ata1: SATA link up 1.5 Gbps (SStatus 113 SControl 310)
ata1.00: qc timeout (cmd 0xec)
ata1.00: failed to IDENTIFY (I/O error, err_mask=0x4)
I'm seeing the same exact thing on a Freescale MPC8610 HPCD board.
This happens
to figure out what the right dev pointer was.
ASoC is kinda screwy in that many fields are not initialized when you
think they should be. More than once I passed a pointer to a wrong
object without realizing it, even though the code worked.
I'll check out these two patches on Monday.
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devices for standard
functionality, I'm not aware of any.
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;
+
+ ugeth_info(%s: MTU = %d (frame size=%d)\n, dev-name,
+ dev-mtu, frame_size);
+ }
+ return 0;
+}
Do you think this is how it should be done? I don't know enough about
ucc_geth and MTUs to know off-hand.
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believe you'll find those entries still there even if your driver
isn't loaded at all.
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On Wed, Mar 11, 2009 at 7:22 PM, Timur Tabi ti...@freescale.com wrote:
Add the definition of the fsl,ssi-asynchronous property to ssi.txt
(documentation
of the device tree bindings for the Freescale SSI device).
Also tidy up the layout of ssi.txt.
Signed-off-by: Timur Tabi ti
properly.
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On Fri, Mar 13, 2009 at 1:56 PM, liran raz liranrazli...@gmail.com wrote:
Does anyone know what I'm missing? or what do I need to configure
in order to have: /dev/ttyCPM2 ?
My guess is that you don't have udev or mdev running.
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? Shouldn't it be a variable,
perhaps something that is based on tb_ticks_per_usec?
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believe that on some platforms,
jiffies never increments. If so, we can't use the actual 'jiffies'
variable.
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aren't
going to happen whether we abstract it with a macro or not.
I think I can live with that.
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depending on the hardware and its priority
scheme), no.
So in that case, I can't rely on jiffies. I guess get_cycle() is my
only choice. The problem is that there is no num_cycles_per_usec().
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Scott Wood wrote:
Or you can say that atomic context is outside the scope of this macro.
No, I don't want to say that. We have wait_event_timeout() for larger-scale
operations. I'm just looking for something that can replace while (!condition);
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controller, so I'm familiar with
the controller but not the code.
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into the loop. He
countered with this:
spin_until_timeout(readb(foo) 0x80, 30 * HZ) {
udelay(10);
/* Maybe do other stuff */
}
But I don't know how to make that work *and* have it return a value indicating
timeout or success.
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Add the definition of the fsl,ssi-asynchronous property to ssi.txt
(documentation
of the device tree bindings for the Freescale SSI device).
Also tidy up the layout of ssi.txt.
Signed-off-by: Timur Tabi ti...@freescale.com
---
v3: rebased
v2: fixed typo, improved wording.
Documentation
timebase register.
Now we can create a generic version of the function that uses jiffies,
and then arch-specific versions where possible. But Alan still needs
to be convinced. I already posted a length rebuttal to his email, but
I haven't gotten a reply yet.
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Kumar Gala wrote:
does not apply cleanly if/after I apply:
powerpc: add fsl, fifo-depth property to Freescale SSI device nodes
That's weird -- I designed the patch so that it would. Oh well, I'll
rebase and repost.
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On Fri, Mar 6, 2009 at 12:49 AM, Liu Dave-R63238 dave...@freescale.com wrote:
could you try to set '1' to DMA description bit3?
Dave,
I'm looking at the 8315e reference manual. What is DMA description bit 3?
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Add the definition of the fsl,ssi-asynchronous property to ssi.txt
(documentation
of the device tree bindings for the Freescale SSI device).
Also tidy up the layout of ssi.txt.
Signed-off-by: Timur Tabi ti...@freescale.com
---
v2: fixed typo, improved wording.
Documentation/powerpc/dts
Add the definition of the fsl,ssi-asynchronous property to ssi.txt
(documentation
of the device tree bindings for the Freescale SSI device).
Also tidy up the layout of ssi.txt.
Signed-off-by: Timur Tabi ti...@freescale.com
---
Documentation/powerpc/dts-bindings/fsl/ssi.txt | 64
. I'll reword it.
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that
specifies the depth of the FIFOs.
Also update the MPC8610 HPCD device tree with this property.
Signed-off-by: Timur Tabi ti...@freescale.com
---
Updates to the SSI audio driver will come later. Currently, this driver
supports only one Freescale SOC, and so it's hard-coded to use the value 8
something else.
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for
more information.
Signed-off-by: Timur Tabi ti...@freescale.com
---
v2: moved the definition from reg.h to reg_booke.h, where it belongs
arch/powerpc/include/asm/reg_booke.h |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/include/asm/reg_booke.h
b/arch
for
more information.
Signed-off-by: Timur Tabi ti...@freescale.com
---
arch/powerpc/include/asm/reg.h |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index c6d1ab6..ca5c7f8 100644
--- a/arch/powerpc/include/asm
Michael Neuling wrote:
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
Shouldn't this be in reg_booke.h?
Yes, you're right.
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= simple-bus, },
{},
};
is the old way. You're missing a compatible=simple-bus in your device tree.
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On Thu, Feb 12, 2009 at 4:51 AM, Vijay Nikam vijay.t.ni...@gmail.com wrote:
Also how I can read the device tree binary file ? ? ?
It would be a lot simpler if you just read the documentation (see
booting-without-of.txt) and looked at other device drivers to see what
they do.
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On Fri, Feb 6, 2009 at 8:00 AM, Timur Tabi ti...@freescale.com wrote:
The i2c_wait() function is using wait_event_interruptible_timeout() to wait
for
the I2C controller to signal that it has completed an I2C bus operation. If
the process that causes the I2C operation terminated abruptly
Jean Delvare wrote:
No, that's something for either Ben Dooks (Cc'd) or the powerpc tree.
This patch has nothing to do with ARM, so Kumar will pick it up, if you
ACK it.
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patches in the recent past, so of course I will assume
that you would apply this one.
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-off-by: Timur Tabi ti...@freescale.com
---
A similar change should probably be done to i2c-cpm.c, and maybe all other
I2C drivers. Not many use wait_event_interruptible_timeout().
drivers/i2c/busses/i2c-mpc.c |9 +++--
1 files changed, 3 insertions(+), 6 deletions(-)
diff --git
On Thu, Feb 5, 2009 at 5:51 AM, Mark Brown broo...@sirena.org.uk wrote:
This is exactly the problem for users that caused Timur to run into this
- further up the stack we're trying to do cleanup that involves writing
via I2C but the I2C writes error out due to the signal.
Well, there's
, which is then passed up through
i2c_smbus_write_byte_data().
So my question is, is i2c-mpc.c wrong in using
wait_event_interruptible_timeout()?
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https
,
+ new_fsl_chan-irq != NO_IRQ ? new_fsl_chan-irq : fdev-irq);
Wouldn't it be better to make sure that, on 83xx, new_fsl_chan-irq has the same
value as fdev-irq before we get here?
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an error. All the device trees already do that. So where
do you see this problem?
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doesn't fix anything.
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Peter Korsgaard wrote:
The only minor issues we have is the cosmetic problem of the driver
printing NO_IRQ (E.G. this patch), and the driver calling
free_irq(NO_IRQ) (E.G. the other patch I sent today) in the release
path.
Ok, I understand.
ACK on the patches.
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David Miller wrote:
I think I'll wait for Kumar's stuff to hit Linus's tree, then
apply this patch.
The patch is safely stored in my inbox and patchwork so there
is no need to fear it getting lost :-)
That's good enough for me. Thanks!
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in_be/out_be pairs with setbits32 or clrbits32, where applicable.
Signed-off-by: Timur Tabi ti...@freescale.com
---
This patch will break ucc_geth.c if my other patch, powerpc: add Ethernet
UPSMR definitions to QE library isn't also applied. That patch is currently
in Kumar's 'next' branch, so
On Wed, Jan 7, 2009 at 2:12 PM, Timur Tabi ti...@freescale.com wrote:
This patch will break ucc_geth.c if my other patch, powerpc: add Ethernet
UPSMR definitions to QE library isn't also applied. That patch is currently
in Kumar's 'next' branch, so it will make 2.6.29-rc0. Therefore
Add the UCC_GETH_UPSMR_xxx definitions to qe.h. The ucc_geth driver will
eventually use these instead of the UPSMR_ macros it currently defines.
Signed-off-by: Timur Tabi ti...@freescale.com
---
arch/powerpc/include/asm/qe.h | 19 ++-
1 files changed, 18 insertions(+), 1
On Tue, Jan 6, 2009 at 9:21 PM, Kumar Gala ga...@kernel.crashing.org wrote:
is there some reason to move the defines into this file?
For consistency. Similar definitions for UART are already in this file.
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On Thu, Dec 18, 2008 at 12:23 PM, Anton Vorontsov
avoront...@ru.mvista.com wrote:
+static int ucc_geth_close(struct net_device *dev);
+static int ucc_geth_open(struct net_device *dev);
I would prefer that you reorder the functions to eliminate the need
for forward references.
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Kumar Gala wrote:
Of these are they all in the kernel tree already? What I mean is QE
usb bindings in linus's tree? I know GTM timers is and this patch
series had the bcsr gpio. Similar question for qe par io. I think we
are good but clearly I leave much of QE to you timur
. The ASoC V2 repository is
available at
http://opensource.wolfsonmicro.com/cgi-bin/gitweb.cgi?p=linux-2.6-asoc.git
under the asoc-v2-dev branch.
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references to global
variables in other files.
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.
And since I fixed the code in the V2 drivers, I have no interest in fixing it in
the V1 drivers, which are officially in maintenance mode -- only critical bug
fixes, no new features.
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there now also has
the changes you wanted without the use of templates in the ASoC core so
you can do a single memory allocation for devices rather than having to
fill out templates and have the core do allocations for you.
Okee dokee. I'll start working on it next month.
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is meant to
check whether the list_for_each() loop got to the end or not.
What do you think?
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list implementation in your head
(which a kernel developer should anyway so this is not so important)
Fair enough.
Acked-by: Timur Tabi [EMAIL PROTECTED]
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Kumar Gala wrote:
this doesn't seem critical right now so I'd say we wait for .29
I agree. None of the defconfigs or default behavior expose this bug. I don't
expect anyone to actually turn off the QE in a real-world situation.
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)
Base address:0x4000
eth1 does work in U-boot, so I know it can be made to work (and I know
the 7385's firmware is uploaded), I just don't know what needs to be
done in Linux.
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Andre Schwarz wrote:
Timur,
is it possible that the PHY adress doesn't match the one specified in
the dts ?
What part of the DTS contains the PHY address? I have this:
[EMAIL PROTECTED] {
#address-cells = 1;
#size-cells = 0
-by: Timur Tabi [EMAIL PROTECTED]
Kumar, please apply.
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the DMA node.
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Trent Piepho wrote:
Seems like it should keep the clock registers at what u-boot set them too.
Or we could have U-Boot put the i2c clock frequency into the I2C node, and let
the driver program the hardware again. That would keep the ugliness in U-Boot.
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at all? Do other boot loaders program the I2C bus speed?
The reason I ask is that I want to know whether it's okay for Linux to ignore
the FDR and DFSRR registers.
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to each I2C device nodes that lists the maximum speed
that this supports. Then the I2C driver could find the smallest of these
speeds, and program the I2C controller for that speed.
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missing something, but U-Boot configures the I2C bus speed.
It does this because the algorithm is specific to the SOC itself. For
example, the 8544 is different from the 8548. It would be a mess to
duplicate this code in the kernel.
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, the console= line goes to the HVC
subsystem, and not my driver, and I can't use it to send the configuration data
the driver needs.
Unfortunately, my driver hasn't been published yet, so it's hard to explain the
details. I guess I need to think about this more.
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patch, only Xen was wrong.
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the Kconfig help file to be very clear that this feature is only
meaningful if the platform has a udbg back-end but no other console or TTY
driver.
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. You take hvc callbacks and route them through udbg, but
this only works on drivers that have udbg callbacks in the first
place. In that case, why would these drivers need an hvc middle-man?
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() in udbg.c instead. Why do some platforms do it one
way, and other platforms do it the other way? Which way is preferred?
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: In function `qe_usb_clock_set':
(.text+0x3cae): undefined reference to `cmxgcr_lock'
make: *** [.tmp_vmlinux1] Error 1
While at it, also add missing spinlock.h includes.
Signed-off-by: Anton Vorontsov [EMAIL PROTECTED]
Acked-By: Timur Tabi [EMAIL PROTECTED]
--
Timur Tabi
Linux kernel
-by: Matthias Fuchs [EMAIL PROTECTED]
Acked-by: Timur Tabi [EMAIL PROTECTED]
--
Timur Tabi
Linux kernel developer at Freescale
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Matthias Fuchs wrote:
Timur,
I missed you posting. But you are right. My patch is ok for 4xx CPUs and
touching
the CONFIG_FSL_BOOKE path was not my intention.
So for CONFIG_FSL_BOOKE WDTP_MASK should be WDTP(0). There is still a
slightly difference
between WDTP(0)=(3 30) | (0x3c 15
then, but what's the point of having a merge
window if you don't actually merge the code?
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Timur Tabi
Linux kernel developer at Freescale
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Because CHRP and PMAC are by default enabled, several non-CHRP and non-PMAC
PowerPC defconfigs will have these Kconfig options set erroneously.
Signed-off-by: Timur Tabi [EMAIL PROTECTED]
---
arch/powerpc/configs/83xx/asp8347_defconfig |2 ++
arch/powerpc/configs/83xx
use. We
change the compatible properties for these channels fsl,ssi-dma-channel.
This works because the sound drivers don't actually check the compatible
property when it grabs channels.
Signed-off-by: Timur Tabi [EMAIL PROTECTED]
---
arch/powerpc/boot/dts/mpc8610_hpcd.dts |4 ++--
1 files
drivers.
Signed-off-by: Timur Tabi [EMAIL PROTECTED]
---
Documentation/powerpc/dts-bindings/fsl/dma.txt | 13 +++--
Documentation/powerpc/dts-bindings/fsl/ssi.txt | 20 ++--
2 files changed, 25 insertions(+), 8 deletions(-)
diff --git a/Documentation/powerpc/dts
?
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Timur Tabi
Linux kernel developer at Freescale
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