Utilize new split between board & SoC, and new SoC device trees split
into pre & post utilizing 'template' includes for SoC IP blocks.
Other changes include:
* Reworked PCIe nodes to allow supportin IRQs for controller (errors)
and moved PCI device IRQs down to virtual bridge level
* Changed GP
On Thu, Nov 17, 2011 at 8:32 AM, Kumar Gala wrote:
> Utilize new split between board & SoC, and new SoC device trees split
> into pre & post utilizing 'template' includes for SoC IP blocks.
>
> Other changes include:
>
> * Reworked PCIe nodes to allow supportin IRQs for controller (errors)
> and
On Nov 17, 2011, at 10:04 AM, Tabi Timur-B04825 wrote:
> On Thu, Nov 17, 2011 at 8:32 AM, Kumar Gala wrote:
>> Utilize new split between board & SoC, and new SoC device trees split
>> into pre & post utilizing 'template' includes for SoC IP blocks.
>>
>> Other changes include:
>>
>> * Reworked
Kumar Gala wrote:
>> > Acked-by: Timur Tabi
> How about a Tested-by:
I did test it.
Tested-by: Timur Tabi
--
Timur Tabi
Linux kernel developer at Freescale
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On Thu, Nov 17, 2011 at 8:32 AM, Kumar Gala wrote:
>
> @@ -585,30 +222,11 @@
> };
>
> pci1: pcie@fffe0a000 {
> - compatible = "fsl,p1022-pcie";
> - device_type = "pci";
> - #interrupt-cells = <1>;
> - #size-cells = <2>;
> -
