Re: [PATCH] [POWERPC] 4xx: Fix problem with new TLB storage attibute fields on 440x6 core

On Tue, 6 May 2008 18:41:44 +0200 Stefan Roese <[EMAIL PROTECTED]> wrote: > On Tuesday 06 May 2008, Josh Boyer wrote: > > > The new 440x6 core used on AMCC 460EX/GT introduces new storage attibure > > > fields to the TLB2 word. Those are: > > > > > > Bit 11 12 13 14 15 > > > WL1 IL1

Re: [PATCH] [POWERPC] 4xx: Fix problem with new TLB storage attibute fields on 440x6 core

On Tuesday 06 May 2008, Josh Boyer wrote: > > The new 440x6 core used on AMCC 460EX/GT introduces new storage attibure > > fields to the TLB2 word. Those are: > > > > Bit 11 12 13 14 15 > > WL1 IL1I IL1D IL2I IL2D > > > > With these bits the cache (L1 and L2) can be configured in a m

Re: [PATCH] [POWERPC] 4xx: Fix problem with new TLB storage attibute fields on 440x6 core

On Mon, 5 May 2008 08:53:19 +0200 Stefan Roese <[EMAIL PROTECTED]> wrote: > The new 440x6 core used on AMCC 460EX/GT introduces new storage attibure > fields to the TLB2 word. Those are: > > Bit 11 12 13 14 15 > WL1 IL1I IL1D IL2I IL2D > > With these bits the cache (L1 and L2) ca

[PATCH] [POWERPC] 4xx: Fix problem with new TLB storage attibute fields on 440x6 core

The new 440x6 core used on AMCC 460EX/GT introduces new storage attibure fields to the TLB2 word. Those are: Bit 11 12 13 14 15 WL1 IL1I IL1D IL2I IL2D With these bits the cache (L1 and L2) can be configured in a more flexible way, instruction- and data-cache independently now. The