RE: [PATCH] ASoC: fsl_sai: Add isr to deal with error flag

2014-03-27 Thread David Laight
From: Mark Brown On Wed, Mar 26, 2014 at 11:59:53AM +, David Laight wrote: From: Nicolin Chen + regmap_read(sai-regmap, FSL_SAI_TCSR, xcsr); + regmap_write(sai-regmap, FSL_SAI_TCSR, xcsr); Assuming these are 'write to clear' bits, you might want to make the write (above) and

Re: [PATCH] ASoC: fsl_sai: Add isr to deal with error flag

2014-03-27 Thread Mark Brown
On Thu, Mar 27, 2014 at 11:57:27AM +0800, Nicolin Chen wrote: On Thu, Mar 27, 2014 at 12:06:53PM +0800, Xiubo Li-B47053 wrote: I have checked in the Vybrid and LS1 SoC datasheets, and they are all the Same as above, and nothing else. Have I missed ? What i.MX IC team told me is SAI

Re: [PATCH] ASoC: fsl_sai: Add isr to deal with error flag

2014-03-27 Thread Mark Brown
On Thu, Mar 27, 2014 at 09:41:20AM +, David Laight wrote: From: Mark Brown The trace is already conditional? I'd also expect to see the driver only acknowledging sources it knows about and only reporting that the interrupt was handled if it saw one of them - right now all interrupts

[PATCH] ASoC: fsl_sai: Add isr to deal with error flag

2014-03-26 Thread Nicolin Chen
It's quite cricial to clear error flags because SAI might hang if getting FIFO underrun during playback (I haven't confirmed the same issue on Rx overflow though). So this patch enables those irq and adds isr() to clear the flags so as to keep playback entirely safe. Signed-off-by: Nicolin Chen

RE: [PATCH] ASoC: fsl_sai: Add isr to deal with error flag

2014-03-26 Thread David Laight
From: Nicolin Chen It's quite cricial to clear error flags because SAI might hang if getting FIFO underrun during playback (I haven't confirmed the same issue on Rx overflow though). So this patch enables those irq and adds isr() to clear the flags so as to keep playback entirely safe.

Re: [PATCH] ASoC: fsl_sai: Add isr to deal with error flag

2014-03-26 Thread Mark Brown
On Wed, Mar 26, 2014 at 11:59:53AM +, David Laight wrote: From: Nicolin Chen + regmap_read(sai-regmap, FSL_SAI_TCSR, xcsr); + regmap_write(sai-regmap, FSL_SAI_TCSR, xcsr); Assuming these are 'write to clear' bits, you might want to make the write (above) and all the traces (below)

RE: [PATCH] ASoC: fsl_sai: Add isr to deal with error flag

2014-03-26 Thread li.xi...@freescale.com
+ regmap_read(sai-regmap, FSL_SAI_TCSR, xcsr); + regmap_write(sai-regmap, FSL_SAI_TCSR, xcsr); + + if (xcsr FSL_SAI_CSR_WSF) + dev_dbg(dev, isr: Start of Tx word detected\n); + + if (xcsr FSL_SAI_CSR_SEF) + dev_dbg(dev, isr: Tx Frame sync error

Re: [alsa-devel] [PATCH] ASoC: fsl_sai: Add isr to deal with error flag

2014-03-26 Thread Nicolin Chen
On Thu, Mar 27, 2014 at 01:14:24AM +, Mark Brown wrote: On Wed, Mar 26, 2014 at 11:59:53AM +, David Laight wrote: From: Nicolin Chen + regmap_read(sai-regmap, FSL_SAI_TCSR, xcsr); + regmap_write(sai-regmap, FSL_SAI_TCSR, xcsr); Assuming these are 'write to clear' bits, you

Re: [PATCH] ASoC: fsl_sai: Add isr to deal with error flag

2014-03-26 Thread Nicolin Chen
On Thu, Mar 27, 2014 at 10:13:48AM +0800, Xiubo Li-B47053 wrote: + regmap_read(sai-regmap, FSL_SAI_TCSR, xcsr); + regmap_write(sai-regmap, FSL_SAI_TCSR, xcsr); + + if (xcsr FSL_SAI_CSR_WSF) + dev_dbg(dev, isr: Start of Tx word detected\n); + + if (xcsr

RE: [PATCH] ASoC: fsl_sai: Add isr to deal with error flag

2014-03-26 Thread li.xi...@freescale.com
On Thu, Mar 27, 2014 at 10:13:48AM +0800, Xiubo Li-B47053 wrote: + regmap_read(sai-regmap, FSL_SAI_TCSR, xcsr); + regmap_write(sai-regmap, FSL_SAI_TCSR, xcsr); + + if (xcsr FSL_SAI_CSR_WSF) + dev_dbg(dev, isr: Start of Tx word detected\n); + + if (xcsr

Re: [PATCH] ASoC: fsl_sai: Add isr to deal with error flag

2014-03-26 Thread Nicolin Chen
On Thu, Mar 27, 2014 at 10:53:50AM +0800, Xiubo Li-B47053 wrote: On Thu, Mar 27, 2014 at 10:13:48AM +0800, Xiubo Li-B47053 wrote: + regmap_read(sai-regmap, FSL_SAI_TCSR, xcsr); + regmap_write(sai-regmap, FSL_SAI_TCSR, xcsr); + + if (xcsr FSL_SAI_CSR_WSF) +

RE: [PATCH] ASoC: fsl_sai: Add isr to deal with error flag

2014-03-26 Thread li.xi...@freescale.com
Subject: Re: [PATCH] ASoC: fsl_sai: Add isr to deal with error flag On Thu, Mar 27, 2014 at 10:53:50AM +0800, Xiubo Li-B47053 wrote: On Thu, Mar 27, 2014 at 10:13:48AM +0800, Xiubo Li-B47053 wrote: + regmap_read(sai-regmap, FSL_SAI_TCSR, xcsr); + regmap_write(sai-regmap

Re: [PATCH] ASoC: fsl_sai: Add isr to deal with error flag

2014-03-26 Thread Nicolin Chen
On Thu, Mar 27, 2014 at 11:41:02AM +0800, Xiubo Li-B47053 wrote: Subject: Re: [PATCH] ASoC: fsl_sai: Add isr to deal with error flag On Thu, Mar 27, 2014 at 10:53:50AM +0800, Xiubo Li-B47053 wrote: On Thu, Mar 27, 2014 at 10:13:48AM +0800, Xiubo Li-B47053 wrote: + regmap_read

RE: [PATCH] ASoC: fsl_sai: Add isr to deal with error flag

2014-03-26 Thread li.xi...@freescale.com
+ if (xcsr FSL_SAI_CSR_FWF) + dev_dbg(dev, isr: Enabled transmit FIFO is empty\n); + + if (xcsr FSL_SAI_CSR_FRF) + dev_dbg(dev, isr: Transmit FIFO watermark has been reached\n); + While are these ones really needed to clear

Re: [PATCH] ASoC: fsl_sai: Add isr to deal with error flag

2014-03-26 Thread Nicolin Chen
On Thu, Mar 27, 2014 at 12:06:53PM +0800, Xiubo Li-B47053 wrote: + if (xcsr FSL_SAI_CSR_FWF) + dev_dbg(dev, isr: Enabled transmit FIFO is empty\n); + + if (xcsr FSL_SAI_CSR_FRF) + dev_dbg(dev, isr: Transmit

RE: [PATCH] ASoC: fsl_sai: Add isr to deal with error flag

2014-03-26 Thread li.xi...@freescale.com
So let's just ignore the clearance of these bits in isr(). + SAI Transmit Control Register (I2S1_TCSR) : 32 : R/W : _h I'm talking about FWF and FRF bits, not TCSR as a register. - I have checked in the Vybrid and LS1 SoC datasheets, and they are all the Same