Josh Boyer wrote:
> On Wed, 16 Jan 2008 16:25:23 -0500
> Sean MacLennan <[EMAIL PROTECTED]> wrote:
>
>
>> Sean MacLennan wrote:
>>
>>> How about adding a config option that lets you specify 8 bit access?
>>> Something like CONFIG_NDFC_8BIT_ACCESS. We could default it to no and
>>> put a l
On Wed, 16 Jan 2008 16:25:23 -0500
Sean MacLennan <[EMAIL PROTECTED]> wrote:
> Sean MacLennan wrote:
> > How about adding a config option that lets you specify 8 bit access?
> > Something like CONFIG_NDFC_8BIT_ACCESS. We could default it to no and
> > put a little blurb that says something like:
Sean MacLennan wrote:
> How about adding a config option that lets you specify 8 bit access?
> Something like CONFIG_NDFC_8BIT_ACCESS. We could default it to no and
> put a little blurb that says something like:
>
> On some platforms the 32bit read/writes cause a machine access
> exception. If y
Stefan Roese wrote:
> Bummer! Was worth a try though. I still don't see why this should fail on
> your
> platform. What error/exception do you get upon 32bit access btw?
>
Ask and Ye Shall RX! Here is a complete trace of the crash including the
NAND debug outputs.
Cheers,
Sean
NDFC NAND
On Tuesday 15 January 2008, Sean MacLennan wrote:
> Stefan Roese wrote:
> > Right. One thing I noticed though is, that you map the NAND to
> > 0xd000, which is reserved for PCI in the 440EP address space. I
> > suggest you map it to 0x9000 as done on Bamboo. Please give it a try
> > and let
Stefan Roese wrote:
>
> Right. One thing I noticed though is, that you map the NAND to 0xd000,
> which is reserved for PCI in the 440EP address space. I suggest you map it to
> 0x9000 as done on Bamboo. Please give it a try and let me know if this
> changes the 32bit access behavior.
>
On Monday 14 January 2008, Sean MacLennan wrote:
> Stefan Roese wrote:
> > And the EBC0_BxCR & EBC0BxAP registers for the CS where the NAND is
> > connected? How are they configured?
>
> EBC0_B1CR d001c000
> EBC0_B1AP 18003c0
>
> Which matches the defines in include/configs/warp.h:
>
> #define
Stefan Roese wrote:
> And the EBC0_BxCR & EBC0BxAP registers for the CS where the NAND is
> connected?
> How are they configured?
>
EBC0_B1CR d001c000
EBC0_B1AP 18003c0
Which matches the defines in include/configs/warp.h:
#define CFG_EBC_PB1AP0x018003c0
#define CFG_EBC_PB1CR
On Monday 14 January 2008, Sean MacLennan wrote:
> Josh Boyer wrote:
> > But did you go back and verify the EBC settings were correct on your
> > board? This shouldn't be needed at all if the EBC bank settings and
> > timings are correct.
> >
> > josh
>
> In the EBC0_CFG register we set the RTC (R
Josh Boyer wrote:
>
> But did you go back and verify the EBC settings were correct on your
> board? This shouldn't be needed at all if the EBC bank settings and
> timings are correct.
>
> josh
>
In the EBC0_CFG register we set the RTC (Ready Timeout Count) to 0 and
the sequoia uses 7. Also we
On Sun, 13 Jan 2008 23:55:21 -0500
Sean MacLennan <[EMAIL PROTECTED]> wrote:
> Stefan Roese wrote:
> >
> >> +#ifdef CONFIG_TACO
> >> +/* The NDFC may allow 32bit read/writes, but it sure doesn't work on
> >> + * the taco!
> >> + */
> >>
> >
> > We definitely don't want to see such board speci
Stefan Roese wrote:
>
>> +#ifdef CONFIG_TACO
>> +/* The NDFC may allow 32bit read/writes, but it sure doesn't work on
>> + * the taco!
>> + */
>>
>
> We definitely don't want to see such board specific stuff in the common
> NDFC driver. And I really doubt that you need this change for your boa
On Wed, 09 Jan 2008 13:50:41 -0500
Sean MacLennan <[EMAIL PROTECTED]> wrote:
> No. You have to setup everything the old way. This *just* gets it
> working so if you have the PPC layout, it will work.
>
> Unless testing goes *really* well, I doubt I will have time in the short
> term to port it
Josh Boyer wrote:
> On Wed, 09 Jan 2008 13:05:35 -0500
> Sean MacLennan <[EMAIL PROTECTED]> wrote:
>
>
>> Stefan Roese wrote:
>>
>>> On Saturday 05 January 2008, Sean MacLennan wrote:
>>>
>>>
This patch adds the maps for the taco. It also gets the ndfc.c NAND
driver in a
On Wed, 09 Jan 2008 13:05:35 -0500
Sean MacLennan <[EMAIL PROTECTED]> wrote:
> Stefan Roese wrote:
> > On Saturday 05 January 2008, Sean MacLennan wrote:
> >
> >> This patch adds the maps for the taco. It also gets the ndfc.c NAND
> >> driver in a compilable state. The map is guaranteed to chan
Stefan Roese wrote:
> On Saturday 05 January 2008, Sean MacLennan wrote:
>
>> This patch adds the maps for the taco. It also gets the ndfc.c NAND
>> driver in a compilable state. The map is guaranteed to change since the
>> exact NOR/NAND flash configuration is in flux right now when we found
>>
On Sat, Jan 05, 2008 at 10:20:58PM -0500, Sean MacLennan wrote:
> David Gibson wrote:
> >> I'm pretty sure that you don't need a board specific mapping driver
> >> for NOR flash. physmap_of should be exactly what you need. You just need
> >> to fill the device tree properties correctly.
> >>
>
David Gibson wrote:
>> I'm pretty sure that you don't need a board specific mapping driver
>> for NOR flash. physmap_of should be exactly what you need. You just need
>> to fill the device tree properties correctly.
>>
>
> Absolutely. We should not be using C-coded maps in arch/powerpc
>
>
On Sat, Jan 05, 2008 at 10:41:17AM +0100, Stefan Roese wrote:
> On Saturday 05 January 2008, Sean MacLennan wrote:
> > +++ drivers/mtd/maps/taco.c 2008-01-02 13:07:43.0 -0500
> > @@ -0,0 +1,140 @@
> > +/*
> > + * $Id: $
> > + *
> > + * drivers/mtd/maps/taco.c
> > + *
> > + * Mapping for
On Saturday 05 January 2008, Sean MacLennan wrote:
> > You do break arch/ppc support with this patch. We have to still support
> > arch/ppc a few month, so please don't break this support for now.
> >
> Gotcha. Is CONFIG_PPC_MERGED the right flag for things like this?
Yes, but it it's spelled C
Stefan Roese wrote:
> On Saturday 05 January 2008, Sean MacLennan wrote:
>
>> This patch adds the maps for the taco. It also gets the ndfc.c NAND
>> driver in a compilable state. The map is guaranteed to change since the
>> exact NOR/NAND flash configuration is in flux right now when we found
>>
On Saturday 05 January 2008, Sean MacLennan wrote:
> This patch adds the maps for the taco. It also gets the ndfc.c NAND
> driver in a compilable state. The map is guaranteed to change since the
> exact NOR/NAND flash configuration is in flux right now when we found
> the 256M NAND flash won't boot
This patch adds the maps for the taco. It also gets the ndfc.c NAND
driver in a compilable state. The map is guaranteed to change since the
exact NOR/NAND flash configuration is in flux right now when we found
the 256M NAND flash won't boot properly.
Currently it configures the NOR in a reason
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