??: [PATCH] fs_enet: fix freescale FCC ethernet dp buffer alignment

[mailto:netdev-ow...@vger.kernel.org] ?? David Laight : 2011?6?17? 18:16 ???: yangy...@neusoft.com; Holger Brunck; linuxppc-dev@lists.ozlabs.org ??: net...@vger.kernel.org; Clive Stubbings; Vitaly Bordug ??: RE: [PATCH] fs_enet: fix freescale FCC ethernet dp buffer alignment Hello, Motioned

答复: [PATCH] fs_enet: fix freescale FCC ethernet dp buffer alignment

Holger Brunck 发送时间: 2011年6月17日 16:31 收件人: linuxppc-dev@lists.ozlabs.org 抄送: Clive Stubbings; Holger Brunck; Pantelis Antoniou; Vitaly Bordug; net...@vger.kernel.org 主题: [PATCH] fs_enet: fix freescale FCC ethernet dp buffer alignment From: Clive Stubbings clive.stubbi...@xentech.co.uk The RIPTR

RE: [PATCH] fs_enet: fix freescale FCC ethernet dp buffer alignment

Hello, Motioned to the memory aligned, now there is such requirement: When the driver send an packet to hardware, the skb's address passed by stack do a dma map into hardware, the skb's dma address must be 64-byte aligned. Does the hardware support buffer chaining? In which case you only

Re: [PATCH] fs_enet: fix freescale FCC ethernet dp buffer alignment

From: Holger Brunck holger.bru...@keymile.com Date: Fri, 17 Jun 2011 10:30:39 +0200 From: Clive Stubbings clive.stubbi...@xentech.co.uk The RIPTR and TIPTR (receive/transmit internal temporary data pointer), used by microcode as a temporary buffer for data, must be 32-byte aligned