>
> +
> + if (machine_is(p1021_mds)) {
> +#define MPC85xx_PMUXCR_OFFSET 0x60
> +#define MPC85xx_PMUXCR_QE0 0x8000
> +#define MPC85xx_PMUXCR_QE3 0x1000
> +#define MPC85xx_PMUXCR_QE9 0x0040
> +#define MPC85xx_PMUXCR_QE12 0x
P1021 is a dual e500v2 core based SOC with:
* 3 eTSECs (eTSEC1/3 RGMII, eTSEC2 SGMII on this board)
* 2 PCIe Controller
* 1 USB2.0 controller
* eSDHC, eSPI, I2C, DUART
* eLBC (NAND, BCSR, PMC0/1)
* Security Engine (SEC 3.3.2)
* Quicc Engine (QE)
Signed-off-by: Haiying Wang
Signed-off-by: Yu Liu
