[PATCH] powerpc/pci: fix PCI-e check link issue

For Freescale powerpc platform, the PCI-e bus number uses the reassign mode by default. It means the second PCI-e controller's hose->first_busno is the first controller's last bus number adding 1. For some hotpluged device(or controlled by FPGA), the device is linked to PCI-e slot at linux runtime.

Re: [PATCH] powerpc/pci: fix PCI-e check link issue

On Friday 17 May 2013 15:35:29 Yuanquan Chen wrote: > For Freescale powerpc platform, the PCI-e bus number uses the reassign mode > by default. It means the second PCI-e controller's hose->first_busno is the > first controller's last bus number adding 1. For some hotpluged device(or > controlled by