On Mon, 2011-06-27 at 05:14 -0500, Ayman El-Khashab wrote:
> > I took care of that in my patch. Basically it let the
> > system go to gen-2 speeds and negotiate down.
> > [marri] Great thx.
>
> Ok, so I am back from doing whatever it is that I do. Shall
> I go ahead and take a stab at making a n
On Tue, May 31, 2011 at 02:27:19PM -0700, Tirumala Marri wrote:
> Not sure how I would know -- But with my eiger kit, I got a
> cd from amcc that had a patched 2.6.30 or something kernel
> in it to support the 460SX. The pci code was basically
> subverted by adding a "port->link=1" at the very en
Not sure how I would know -- But with my eiger kit, I got a
cd from amcc that had a patched 2.6.30 or something kernel
in it to support the 460SX. The pci code was basically
subverted by adding a "port->link=1" at the very end of the
link check to always force it to succeed. However this code
ne
The interesting question of course is whether that 460SX stuff is the
same as what we're using internally :-)
[marri] Sometimes open-source and internal releases may not be the same
Because of open-source standards.
Can we fix that ?
[marri] Sure I will take a look at it.
_
On Fri, 2011-05-27 at 11:51 -0500, Ayman El-Khashab wrote:
> On Tue, May 24, 2011 at 01:40:12PM +1000, Benjamin Herrenschmidt wrote:
> > On Thu, 2011-05-12 at 11:16 -0700, Tirumala Marri wrote:
> >
> > The register above
> > > PECFGn_DLLSTA is actually in the PCIe configuration space so
> > > we
On Tue, May 24, 2011 at 01:40:12PM +1000, Benjamin Herrenschmidt wrote:
> On Thu, 2011-05-12 at 11:16 -0700, Tirumala Marri wrote:
>
> The register above
> > PECFGn_DLLSTA is actually in the PCIe configuration space so
> > we would have to map that in to be able to read that
> > register during t
On Thu, 2011-05-12 at 11:16 -0700, Tirumala Marri wrote:
> So what is the best way to handle this? It appears (based
> on the comments of others and my own experience) that there
> is no DCR that exists and behaves the way that previous SOCs
> behaved to give us the link status?
The register ab
So what is the best way to handle this? It appears (based
on the comments of others and my own experience) that there
is no DCR that exists and behaves the way that previous SOCs
behaved to give us the link status? The register above
PECFGn_DLLSTA is actually in the PCIe configuration space so
we
On Thu, May 05, 2011 at 09:44:27AM -0700, Tirumala Marri wrote:
> >
> > Also, the patch removes the code for waiting for the link to be up with
> > a comment "What DCR has the link status on the 460SX?". Please fix that
> > (Tirumala, can you provide the missing information ?)
> >
>
> It is not on
>
> Also, the patch removes the code for waiting for the link to be up with
> a comment "What DCR has the link status on the 460SX?". Please fix that
> (Tirumala, can you provide the missing information ?)
>
It is not one register. Here is the flow for Gen-1.
1. PECFGn_DLLSTA[3] will be asserted w
On Sat, 2011-04-30 at 06:37 +1000, Benjamin Herrenschmidt wrote:
> On Fri, 2011-04-29 at 12:02 -0500, Ayman El-Khashab wrote:
> > On Tue, Apr 12, 2011 at 07:09:49PM -0700, Tirumala Marri wrote:
> > > You originally submitted the support for 460ex. Can you chime in (and
> > > review Ayman patch) ple
I'm tempted to put it in if Tirumala doesn't get to review it asap.
[Marri] Sorry for the late response. I don't see any issue with changes,
please go ahead.
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On Fri, 2011-04-29 at 12:02 -0500, Ayman El-Khashab wrote:
> On Tue, Apr 12, 2011 at 07:09:49PM -0700, Tirumala Marri wrote:
> > You originally submitted the support for 460ex. Can you chime in (and
> > review Ayman patch) please ?
> >
> > [Marri] Ben sure I will review it and send you my feedback
On Tue, Apr 12, 2011 at 07:09:49PM -0700, Tirumala Marri wrote:
> You originally submitted the support for 460ex. Can you chime in (and
> review Ayman patch) please ?
>
> [Marri] Ben sure I will review it and send you my feedback in couple of
> days.
Is there any update on this patch? Any commen
You originally submitted the support for 460ex. Can you chime in (and
review Ayman patch) please ?
[Marri] Ben sure I will review it and send you my feedback in couple of
days.
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On Fri, 2011-04-08 at 13:22 -0500, Ayman El-Khashab wrote:
> From: Ayman El-Khashab
>
> This patch is to fix the PCIe on the 460SX CPU. As far as I can tell,
> the 460SX must be using a different core than the previous 4xx SOCs.
> The registers aren't the same and it appears DCRs that existed on
From: Ayman El-Khashab
This patch is to fix the PCIe on the 460SX CPU. As far as I can tell,
the 460SX must be using a different core than the previous 4xx SOCs.
The registers aren't the same and it appears DCRs that existed on
previous parts don't exist on this one. Perhaps somebody from AMCC
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