Re: [PATCH 1/2] v2 476: Set CCR2[DSTI] to prevent isync from flushing shadow TLB

2010-10-12 Thread Dave Kleikamp
Josh, Please pull this patch. I just found a bone-headed mistake that makes the whole patch a no-op. I'll need to fix it and put it through a bit of testing before I can re-submit it. The other patch in this series should be okay. Thanks, Shaggy On Mon, 2010-09-27 at 16:56 -0500, Dave

Re: [PATCH 1/2] v2 476: Set CCR2[DSTI] to prevent isync from flushing shadow TLB

2010-10-12 Thread Josh Boyer
On Tue, Oct 12, 2010 at 02:40:13PM -0500, Dave Kleikamp wrote: Josh, Please pull this patch. I just found a bone-headed mistake that makes the whole patch a no-op. I'll need to fix it and put it through a bit of testing before I can re-submit it. OK. I should have looked more closely myself.

[PATCH 1/2] v2 476: Set CCR2[DSTI] to prevent isync from flushing shadow TLB

2010-09-27 Thread Dave Kleikamp
When the DSTI (Disable Shadow TLB Invalidate) bit is set in the CCR2 register, the isync command does not flush the shadow TLB (iTLB dTLB). However, since the shadow TLB does not contain context information, we want the shadow TLB flushed in situations where we are switching context. In those