[PATCH 1/3] powerpc: Avoid load hit store in __giveup_fpu() and __giveup_altivec()

2016-05-29 Thread Anton Blanchard
From: Anton Blanchard In both __giveup_fpu() and __giveup_altivec() we make two modifications to tsk->thread.regs->msr. gcc decides to do a read/modify/write of each change, so we end up with a load hit store: ld r9,264(r10) rldicl r9,r9,50,1 rotldi r9,r9,14

Re: [PATCH 1/3] powerpc: Avoid load hit store in __giveup_fpu() and __giveup_altivec()

2016-05-30 Thread Gabriel Paubert
On Sun, May 29, 2016 at 10:03:50PM +1000, Anton Blanchard wrote: > From: Anton Blanchard > > In both __giveup_fpu() and __giveup_altivec() we make two modifications > to tsk->thread.regs->msr. gcc decides to do a read/modify/write of > each change, so we end up with a load hit store: > >

Re: [PATCH 1/3] powerpc: Avoid load hit store in __giveup_fpu() and __giveup_altivec()

2016-05-31 Thread Anton Blanchard via Linuxppc-dev
> Huh? Make it an unsigned long please, which is the type of the msr > field in struct pt_regs to work on both 32 and 64 bit processors. Thanks, not sure what I was thinking there. Will respin. Anton ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozl

Re: [PATCH 1/3] powerpc: Avoid load hit store in __giveup_fpu() and __giveup_altivec()

2016-05-31 Thread Michael Ellerman
On Tue, 2016-05-31 at 20:09 +1000, Anton Blanchard wrote: > > Huh? Make it an unsigned long please, which is the type of the msr > > field in struct pt_regs to work on both 32 and 64 bit processors. > > Thanks, not sure what I was thinking there. Will respin. I'll fix it up here. cheers ___