On Tue, Nov 27, 2007 at 10:41:46AM +1100, Benjamin Herrenschmidt wrote:
BTW... Do you know why we can't just enable HW snoop ? The 440SPe
documentation seems to indicate that this is supported by the L2 cache
via snooping on the PLB.
Unless something has been changed significantly in the 44x
On Wed, 2007-11-28 at 11:47 -0800, Eugene Surovegin wrote:
On Tue, Nov 27, 2007 at 10:41:46AM +1100, Benjamin Herrenschmidt wrote:
BTW... Do you know why we can't just enable HW snoop ? The 440SPe
documentation seems to indicate that this is supported by the L2 cache
via snooping on the
BTW... Do you know why we can't just enable HW snoop ? The 440SPe
documentation seems to indicate that this is supported by the L2 cache
via snooping on the PLB.
Cheers,
Ben.
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Hi Olof,
On 07.11.2007, 7:06:08 you wrote:
...
+
+config L2_CACHE
+ bool Enable Level-2 Cache
+ depends on NOT_COHERENT_CACHE (KATMAI || TAISHAN || OCOTEA ||
ALPR)
+ default y
+ help
+ This option enables L2-cache on ppc44x controllers.
+ If
This patch introduces the L2_CACHE configuration option available
for the ppc44x-based boards with L2-cache enabled.
Signed-off-by: Yuri Tikhonov [EMAIL PROTECTED]
Signed-off-by: Pavel Kolesnikov [EMAIL PROTECTED]
--
diff --git a/arch/ppc/platforms/4xx/Kconfig b/arch/ppc/platforms/4xx/Kconfig
Hi,
See comments below.
-Olof
On Wed, Nov 07, 2007 at 01:40:41AM +0300, Yuri Tikhonov wrote:
This patch introduces the L2_CACHE configuration option available
for the ppc44x-based boards with L2-cache enabled.
Signed-off-by: Yuri Tikhonov [EMAIL PROTECTED]
Signed-off-by: Pavel