The kernel thread path in copy_thread creates a user interrupt frame on stack and stores the function and arg parameters there, and ret_from_kernel_thread loads them. This is a slightly confusing way to overload that frame. Non-volatile registers are loaded from the switch frame, so the parameters can be stored there.
Signed-off-by: Nicholas Piggin <npig...@gmail.com> --- arch/powerpc/kernel/entry_32.S | 1 - arch/powerpc/kernel/interrupt_64.S | 1 - arch/powerpc/kernel/process.c | 9 +++++++++ 3 files changed, 9 insertions(+), 2 deletions(-) diff --git a/arch/powerpc/kernel/entry_32.S b/arch/powerpc/kernel/entry_32.S index 755408c63be8..c3fdb3081d3d 100644 --- a/arch/powerpc/kernel/entry_32.S +++ b/arch/powerpc/kernel/entry_32.S @@ -188,7 +188,6 @@ ret_from_fork: .globl ret_from_kernel_thread ret_from_kernel_thread: - REST_NVGPRS(r1) bl schedule_tail mtctr r14 mr r3,r15 diff --git a/arch/powerpc/kernel/interrupt_64.S b/arch/powerpc/kernel/interrupt_64.S index fccc34489add..d60e7e7564df 100644 --- a/arch/powerpc/kernel/interrupt_64.S +++ b/arch/powerpc/kernel/interrupt_64.S @@ -741,7 +741,6 @@ _GLOBAL(ret_from_fork) _GLOBAL(ret_from_kernel_thread) bl schedule_tail - REST_NVGPRS(r1) mtctr r14 mr r3,r15 #ifdef CONFIG_PPC64_ELF_ABI_V2 diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c index dc66ca668b44..6cea224b7e60 100644 --- a/arch/powerpc/kernel/process.c +++ b/arch/powerpc/kernel/process.c @@ -1812,6 +1812,15 @@ int copy_thread(struct task_struct *p, const struct kernel_clone_args *args) ((unsigned long *)sp)[0] = sp + STACK_SWITCH_FRAME_SIZE; kregs = (struct pt_regs *)(sp + STACK_SWITCH_FRAME_REGS); kregs->nip = ppc_function_entry(f); + if (unlikely(args->fn)) { + /* + * Put kthread create details in non-volatile GPRs in the + * switch frame so they are loaded by _switch before it + * returns to ret_from_kernel_thread. + */ + kregs->gpr[14] = ppc_function_entry((void *)args->fn); + kregs->gpr[15] = (unsigned long)args->fn_arg; + } p->thread.ksp = sp; #ifdef CONFIG_HAVE_HW_BREAKPOINT -- 2.37.2