The layout of the new VSR registers and how they overlap on top of the
legacy FPR and VR registers is:
VSR doubleword 0 VSR doubleword 1
VSR[0] | FPR[0]|
The layout of the new VSR registers and how they overlap on top of the
legacy FPR and VR registers is:
VSR doubleword 0 VSR doubleword 1
VSR[0] | FPR[0]|
The layout of the new VSR registers and how they overlap on top of the
legacy FPR and VR registers is:
VSR doubleword 0 VSR doubleword 1
VSR[0] | FPR[0]|
The layout of the new VSR registers and how they overlap on top of the
legacy FPR and VR registers is:
VSR doubleword 0 VSR doubleword 1
VSR[0] | FPR[0]|
Index: linux-2.6-ozlabs/include/asm-powerpc/processor.h
===
--- linux-2.6-ozlabs.orig/include/asm-powerpc/processor.h
+++ linux-2.6-ozlabs/include/asm-powerpc/processor.h
@@ -78,6 +78,7 @@ extern long kernel_thread(int (*fn)(void
/*
In message [EMAIL PROTECTED] you wrote
:
+ } fpvsr __attribute__((aligned(16)));
Do we really need a union here? what would happen if you just
changed
the type of fpr[32] from double to vector if #CONFIG_VSX?
I really dont like the union and think we can just make the storage
On Jun 19, 2008, at 1:01 AM, Michael Neuling wrote:
In message B0E87874-BC65-4037-
[EMAIL PROTECTED] you wrote
:
+ } fpvsr __attribute__((aligned(16)));
Do we really need a union here? what would happen if you just
changed
the type of fpr[32] from double to vector if #CONFIG_VSX?
I
On Thu, 2008-06-19 at 01:10 -0500, Kumar Gala wrote:
I still think using the union makes it is easier to read than what you
have here. Also, it better reflects the structure of what's being
stored there.
I don't think that holds much weight with me. We don't union the
vector128 type
On Jun 19, 2008, at 4:33 AM, Benjamin Herrenschmidt wrote:
On Thu, 2008-06-19 at 01:10 -0500, Kumar Gala wrote:
I still think using the union makes it is easier to read than what
you
have here. Also, it better reflects the structure of what's being
stored there.
I don't think that holds
The layout of the new VSR registers and how they overlap on top of the
legacy FPR and VR registers is:
VSR doubleword 0 VSR doubleword 1
VSR[0] | FPR[0]|
On Jun 17, 2008, at 7:47 PM, Michael Neuling wrote:
The layout of the new VSR registers and how they overlap on top of the
legacy FPR and VR registers is:
VSR doubleword 0 VSR doubleword 1
Kumar Gala writes:
Is VSX mutually exclusive with altivec/fp? is there a MSR bit for it?
It's not exclusive, it's an extension of altivec/fp, and yes it has
its own MSR bit to enable it.
Paul.
___
Linuxppc-dev mailing list
Linuxppc-dev@ozlabs.org
On Jun 18, 2008, at 5:58 PM, Paul Mackerras wrote:
Kumar Gala writes:
Is VSX mutually exclusive with altivec/fp? is there a MSR bit for
it?
It's not exclusive, it's an extension of altivec/fp, and yes it has
its own MSR bit to enable it.
what MSR bit does it use... I'm not seeing the
Index: linux-2.6-ozlabs/include/asm-powerpc/processor.h
===
--- linux-2.6-ozlabs.orig/include/asm-powerpc/processor.h
+++ linux-2.6-ozlabs/include/asm-powerpc/processor.h
@@ -78,6 +78,7 @@ extern long kernel_thread(int (*fn)(void
In message [EMAIL PROTECTED] you wrote:
On Jun 18, 2008, at 5:58 PM, Paul Mackerras wrote:
Kumar Gala writes:
Is VSX mutually exclusive with altivec/fp? is there a MSR bit for
it?
It's not exclusive, it's an extension of altivec/fp, and yes it has
its own MSR bit to enable
In message [EMAIL PROTECTED] you wrote
:
Index: linux-2.6-ozlabs/include/asm-powerpc/processor.h
===
--- linux-2.6-ozlabs.orig/include/asm-powerpc/processor.h
+++ linux-2.6-ozlabs/include/asm-powerpc/processor.h
@@ -78,6
On Jun 18, 2008, at 11:35 PM, Michael Neuling wrote:
In message 5AEB0769-1394-4924-803D-
[EMAIL PROTECTED] you wrote
:
Index: linux-2.6-ozlabs/include/asm-powerpc/processor.h
===
---
In message [EMAIL PROTECTED] you wrote
:
On Jun 18, 2008, at 11:35 PM, Michael Neuling wrote:
In message 5AEB0769-1394-4924-803D-
[EMAIL PROTECTED] you wrote
:
Index: linux-2.6-ozlabs/include/asm-powerpc/processor.h
The layout of the new VSR registers and how they overlap on top of the
legacy FPR and VR registers is:
VSR doubleword 0 VSR doubleword 1
VSR[0] | FPR[0]|
19 matches
Mail list logo
