g...@kroah.com; linux-...@vger.kernel.org; linuxppc-
>d...@lists.ozlabs.org; Fushen Chen
>Subject: Re: [PATCH v14 03/10] USB/ppc4xx: Add Synopsys DWC OTG Core
>Interface Layer (CIL)
>
>On Fri, Oct 7, 2011 at 8:00 AM, wrote:
>> From: Tirumala Marri
>>
>
>[...]
>
>&
On Fri, Oct 7, 2011 at 8:00 AM, wrote:
> From: Tirumala Marri
>
[...]
> + * Do core a soft reset of the core. Be careful with this because it
> + * resets all the internal state machines of the core.
> + */
> +static void dwc_otg_core_reset(struct core_if *core_if)
> +{
> + ulong global
<> +void dwc_otg_enable_global_interrupts(struct core_if *core_if)
<> +{
<> +u32 ahbcfg = 0;
<> +
<> +ahbcfg |= DWC_AHBCFG_GLBL_INT_MASK;
<> +dwc_reg_modify(core_if->core_global_regs, DWC_GAHBCFG, 0,
<> + ahbcfg);
<
core_global_regs, DWC_GAHBCFG,