On Mon, 2015-06-08 at 18:06 +0800, yuantian.t...@freescale.com wrote:
> +
> +_GLOBAL(flush_caches_e500v2)
> + mflr r0
> + bl flush_dcache_L1
> + mtlr r0
> + blr
> +
> +_GLOBAL(flush_caches_e500mc)
> +_GLOBAL(flush_caches_e5500)
> + mflr r0
> + bl flush_dcache_L1
>
From: Tang Yuantian
Various e500 core have different cache architecture, so they
need different cache flush operations. Therefore, add a callback
function cpu_flush_caches to the struct cpu_spec. The cache flush
operation for the specific kind of e500 is selected at init time.
The callback functi
