Le 03/09/2021 à 00:20, Segher Boessenkool a écrit :
On Thu, Sep 02, 2021 at 04:52:03PM -0500, Segher Boessenkool wrote:
On Thu, Sep 02, 2021 at 01:33:10PM +1000, Nicholas Piggin wrote:
Excerpts from Christophe Leroy's message of September 2, 2021 3:21 am:
- /* Firstly we need to enabl
On Thu, Sep 02, 2021 at 04:52:03PM -0500, Segher Boessenkool wrote:
> On Thu, Sep 02, 2021 at 01:33:10PM +1000, Nicholas Piggin wrote:
> > Excerpts from Christophe Leroy's message of September 2, 2021 3:21 am:
> > >> -/* Firstly we need to enable TM in the kernel */
> > >> +/* We ne
On Thu, Sep 02, 2021 at 01:33:10PM +1000, Nicholas Piggin wrote:
> Excerpts from Christophe Leroy's message of September 2, 2021 3:21 am:
> >> - /* Firstly we need to enable TM in the kernel */
> >> + /* We need to enable TM in the kernel, and disable EE (for scv) */
> >>mfmsr r10
> >>l
Excerpts from Christophe Leroy's message of September 2, 2021 3:21 am:
>
>
> Le 01/09/2021 à 18:54, Nicholas Piggin a écrit :
>> If a system call is made with a transaction active, the kernel
>> immediately aborts it and returns. scv system calls disable irqs even
>> earlier in their interrupt ha
Le 01/09/2021 à 18:54, Nicholas Piggin a écrit :
If a system call is made with a transaction active, the kernel
immediately aborts it and returns. scv system calls disable irqs even
earlier in their interrupt handler, and tabort_syscall does not fix this
up.
This can result in irq soft-mask s
If a system call is made with a transaction active, the kernel
immediately aborts it and returns. scv system calls disable irqs even
earlier in their interrupt handler, and tabort_syscall does not fix this
up.
This can result in irq soft-mask state being messed up on the next
kernel entry, and cra
