Re: [PATCH v5 5/9] powerpc/mm/book3s64: Update tlb flush routines to take a page walk cache flush argument

2021-05-20 Thread Segher Boessenkool
Hi! On Thu, May 20, 2021 at 05:37:20PM +1000, Michael Ellerman wrote: > Segher Boessenkool writes: > > On Tue, May 18, 2021 at 07:45:14PM -0500, Segher Boessenkool wrote: > >> On Wed, May 19, 2021 at 10:26:22AM +1000, Michael Ellerman wrote: > >> > Guenter Roeck writes: > >> > > Ah, sorry. I was

Re: [PATCH v5 5/9] powerpc/mm/book3s64: Update tlb flush routines to take a page walk cache flush argument

2021-05-20 Thread Guenter Roeck
On 5/20/21 4:38 AM, Michael Ellerman wrote: Guenter Roeck writes: On 5/18/21 5:26 PM, Michael Ellerman wrote: [ ... ] That was the generic header change in the patch. I was commenting about the ppc64 specific change causing build failures. Ah, sorry. I wasn't aware that the following is vali

Re: [PATCH v5 5/9] powerpc/mm/book3s64: Update tlb flush routines to take a page walk cache flush argument

2021-05-20 Thread Michael Ellerman
Guenter Roeck writes: > On 5/18/21 5:26 PM, Michael Ellerman wrote: > [ ... ] That was the generic header change in the patch. I was commenting about the ppc64 specific change causing build failures. >>> >>> Ah, sorry. I wasn't aware that the following is valid C code >>> >>> void f1() >

Re: [PATCH v5 5/9] powerpc/mm/book3s64: Update tlb flush routines to take a page walk cache flush argument

2021-05-20 Thread Michael Ellerman
Segher Boessenkool writes: > On Tue, May 18, 2021 at 07:45:14PM -0500, Segher Boessenkool wrote: >> On Wed, May 19, 2021 at 10:26:22AM +1000, Michael Ellerman wrote: >> > Guenter Roeck writes: >> > > Ah, sorry. I wasn't aware that the following is valid C code >> > > >> > > void f1() >> > > { >>

Re: [PATCH v5 5/9] powerpc/mm/book3s64: Update tlb flush routines to take a page walk cache flush argument

2021-05-19 Thread Guenter Roeck
On Wed, May 19, 2021 at 09:20:38AM -0500, Segher Boessenkool wrote: > On Wed, May 19, 2021 at 06:37:44AM -0700, Guenter Roeck wrote: > > On 5/19/21 5:03 AM, Segher Boessenkool wrote: > > >On Tue, May 18, 2021 at 07:45:14PM -0500, Segher Boessenkool wrote: > > >>And it actually explicitly is undefin

Re: [PATCH v5 5/9] powerpc/mm/book3s64: Update tlb flush routines to take a page walk cache flush argument

2021-05-19 Thread Segher Boessenkool
On Wed, May 19, 2021 at 06:37:44AM -0700, Guenter Roeck wrote: > On 5/19/21 5:03 AM, Segher Boessenkool wrote: > >On Tue, May 18, 2021 at 07:45:14PM -0500, Segher Boessenkool wrote: > >>And it actually explicitly is undefined behaviour in C90 already > >>(3.6.6.4 in C90, 6.8.6.4 in C99 and later).

Re: [PATCH v5 5/9] powerpc/mm/book3s64: Update tlb flush routines to take a page walk cache flush argument

2021-05-19 Thread Guenter Roeck
On 5/19/21 5:03 AM, Segher Boessenkool wrote: On Tue, May 18, 2021 at 07:45:14PM -0500, Segher Boessenkool wrote: On Wed, May 19, 2021 at 10:26:22AM +1000, Michael Ellerman wrote: Guenter Roeck writes: Ah, sorry. I wasn't aware that the following is valid C code void f1() { return f2()

Re: [PATCH v5 5/9] powerpc/mm/book3s64: Update tlb flush routines to take a page walk cache flush argument

2021-05-19 Thread Segher Boessenkool
On Tue, May 18, 2021 at 07:45:14PM -0500, Segher Boessenkool wrote: > On Wed, May 19, 2021 at 10:26:22AM +1000, Michael Ellerman wrote: > > Guenter Roeck writes: > > > Ah, sorry. I wasn't aware that the following is valid C code > > > > > > void f1() > > > { > > > return f2(); > > >

Re: [PATCH v5 5/9] powerpc/mm/book3s64: Update tlb flush routines to take a page walk cache flush argument

2021-05-18 Thread Guenter Roeck
On 5/18/21 5:26 PM, Michael Ellerman wrote: [ ... ] That was the generic header change in the patch. I was commenting about the ppc64 specific change causing build failures. Ah, sorry. I wasn't aware that the following is valid C code void f1() { return f2(); ^^ } as long as f

Re: [PATCH v5 5/9] powerpc/mm/book3s64: Update tlb flush routines to take a page walk cache flush argument

2021-05-18 Thread Segher Boessenkool
On Wed, May 19, 2021 at 10:26:22AM +1000, Michael Ellerman wrote: > Guenter Roeck writes: > > Ah, sorry. I wasn't aware that the following is valid C code > > > > void f1() > > { > > return f2(); > > ^^ > > } > > > > as long as f2() is void as well. Confusing, but we live and learn.

Re: [PATCH v5 5/9] powerpc/mm/book3s64: Update tlb flush routines to take a page walk cache flush argument

2021-05-18 Thread Michael Ellerman
Guenter Roeck writes: > On 5/17/21 6:55 AM, Aneesh Kumar K.V wrote: >> Guenter Roeck writes: >> >>> On 5/17/21 1:40 AM, Aneesh Kumar K.V wrote: On 5/15/21 10:05 PM, Guenter Roeck wrote: > On Thu, Apr 22, 2021 at 11:13:19AM +0530, Aneesh Kumar K.V wrote: >> >> ... >> >   extern vo

Re: [PATCH v5 5/9] powerpc/mm/book3s64: Update tlb flush routines to take a page walk cache flush argument

2021-05-17 Thread Guenter Roeck
On 5/17/21 6:55 AM, Aneesh Kumar K.V wrote: Guenter Roeck writes: On 5/17/21 1:40 AM, Aneesh Kumar K.V wrote: On 5/15/21 10:05 PM, Guenter Roeck wrote: On Thu, Apr 22, 2021 at 11:13:19AM +0530, Aneesh Kumar K.V wrote: ...   extern void radix__local_flush_all_mm(struct mm_struct *mm); d

Re: [PATCH v5 5/9] powerpc/mm/book3s64: Update tlb flush routines to take a page walk cache flush argument

2021-05-17 Thread Aneesh Kumar K.V
Guenter Roeck writes: > On 5/17/21 1:40 AM, Aneesh Kumar K.V wrote: >> On 5/15/21 10:05 PM, Guenter Roeck wrote: >>> On Thu, Apr 22, 2021 at 11:13:19AM +0530, Aneesh Kumar K.V wrote: ... >>>   extern void radix__local_flush_all_mm(struct mm_struct *mm); diff --git a/arch/powerpc/include/as

Re: [PATCH v5 5/9] powerpc/mm/book3s64: Update tlb flush routines to take a page walk cache flush argument

2021-05-17 Thread Guenter Roeck
On 5/17/21 1:40 AM, Aneesh Kumar K.V wrote: On 5/15/21 10:05 PM, Guenter Roeck wrote: On Thu, Apr 22, 2021 at 11:13:19AM +0530, Aneesh Kumar K.V wrote: No functional change in this patch Signed-off-by: Aneesh Kumar K.V ---   .../include/asm/book3s/64/tlbflush-radix.h    | 19 +++-   ar

Re: [PATCH v5 5/9] powerpc/mm/book3s64: Update tlb flush routines to take a page walk cache flush argument

2021-05-17 Thread Aneesh Kumar K.V
On 5/15/21 10:05 PM, Guenter Roeck wrote: On Thu, Apr 22, 2021 at 11:13:19AM +0530, Aneesh Kumar K.V wrote: No functional change in this patch Signed-off-by: Aneesh Kumar K.V --- .../include/asm/book3s/64/tlbflush-radix.h| 19 +++- arch/powerpc/include/asm/book3s/64/tlbflush.h |

Re: [PATCH v5 5/9] powerpc/mm/book3s64: Update tlb flush routines to take a page walk cache flush argument

2021-05-15 Thread Guenter Roeck
On 5/15/21 1:41 PM, Andrew Morton wrote: On Sat, 15 May 2021 09:35:25 -0700 Guenter Roeck wrote: #define __HAVE_ARCH_FLUSH_PMD_TLB_RANGE static inline void flush_pmd_tlb_range(struct vm_area_struct *vma, unsigned long start

Re: [PATCH v5 5/9] powerpc/mm/book3s64: Update tlb flush routines to take a page walk cache flush argument

2021-05-15 Thread Andrew Morton
On Sat, 15 May 2021 09:35:25 -0700 Guenter Roeck wrote: > > > > #define __HAVE_ARCH_FLUSH_PMD_TLB_RANGE > > static inline void flush_pmd_tlb_range(struct vm_area_struct *vma, > > >unsigned long start, unsigned long end) > > +{ > > +

Re: [PATCH v5 5/9] powerpc/mm/book3s64: Update tlb flush routines to take a page walk cache flush argument

2021-05-15 Thread Guenter Roeck
On Thu, Apr 22, 2021 at 11:13:19AM +0530, Aneesh Kumar K.V wrote: > No functional change in this patch > > Signed-off-by: Aneesh Kumar K.V > --- > .../include/asm/book3s/64/tlbflush-radix.h| 19 +++- > arch/powerpc/include/asm/book3s/64/tlbflush.h | 23 --- > arch/powerpc

[PATCH v5 5/9] powerpc/mm/book3s64: Update tlb flush routines to take a page walk cache flush argument

2021-04-21 Thread Aneesh Kumar K.V
No functional change in this patch Signed-off-by: Aneesh Kumar K.V --- .../include/asm/book3s/64/tlbflush-radix.h| 19 +++- arch/powerpc/include/asm/book3s/64/tlbflush.h | 23 --- arch/powerpc/mm/book3s64/radix_hugetlbpage.c | 4 +-- arch/powerpc/mm/book3s64/radix_tlb.c