RE: [PATCH v6 04/11] PCI: designware-ep: Modify MSI and MSIX CAP way of finding

2020-09-24 Thread Z.q. Hou
xppc-dev@lists.ozlabs.org > Subject: Re: [PATCH v6 04/11] PCI: designware-ep: Modify MSI and MSIX > CAP way of finding > > s/MSIX/MSI-X/ (subject and below) > > On Sat, Mar 14, 2020 at 11:30:31AM +0800, Xiaowei Bao wrote: > > Each PF of EP device should have it's own MSI o

Re: [PATCH v6 04/11] PCI: designware-ep: Modify MSI and MSIX CAP way of finding

2020-09-23 Thread Bjorn Helgaas
s/MSIX/MSI-X/ (subject and below) On Sat, Mar 14, 2020 at 11:30:31AM +0800, Xiaowei Bao wrote: > Each PF of EP device should have it's own MSI or MSIX capabitily > struct, so create a dw_pcie_ep_func struct and remove the msi_cap > and msix_cap to this struct from dw_pcie_ep, and manage the PFs >

Re: [PATCH v6 04/11] PCI: designware-ep: Modify MSI and MSIX CAP way of finding

2020-05-20 Thread Rob Herring
On Sat, Mar 14, 2020 at 11:30:31AM +0800, Xiaowei Bao wrote: > Each PF of EP device should have it's own MSI or MSIX capabitily s/it's/its/ > struct, so create a dw_pcie_ep_func struct and remove the msi_cap > and msix_cap to this struct from dw_pcie_ep, and manage the PFs > with a list. > > Sig

[PATCH v6 04/11] PCI: designware-ep: Modify MSI and MSIX CAP way of finding

2020-03-13 Thread Xiaowei Bao
Each PF of EP device should have it's own MSI or MSIX capabitily struct, so create a dw_pcie_ep_func struct and remove the msi_cap and msix_cap to this struct from dw_pcie_ep, and manage the PFs with a list. Signed-off-by: Xiaowei Bao --- v3: - This is a new patch, to fix the issue of MSI and MS