Hello Stefan,
On Mon, Dec 1, 2008 at 8:46 PM, Stefan Roese s...@denx.de wrote:
On Monday 01 December 2008, Leon Woestenberg wrote:
Now, if I re-program the end-point FPGA during the u-boot boot
time-out, Linux will recognize the end-point.
It's possible that either the reset in between
On Monday 01 December 2008, Leon Woestenberg wrote:
Now, if I re-program the end-point FPGA during the u-boot boot
time-out, Linux will recognize the end-point.
It's possible that either the reset in between goes bonkers or something
else causes your FPGA to stop responding. It looks
