I am working on a Freescale 8314e design, and the embedded device is
configured as a PCI-e endpoint running a 2.6.27-5 kernel. For context, we
have written a kernel module which, among other things, uses the RDMA/WDMA
engine in the PCI-e IP block. On the host side, these DMAs are coherent.
Howeve
@ozlabs.org] On Behalf
Of Ben Menchaca
Sent: Friday, March 06, 2009 12:33 PM
To: linuxppc-dev@ozlabs.org
Subject: 83xx: Marking or Allocating Pages as Cache-Inhibited
I am working on a Freescale 8314e design, and the embedded
device is configured as a PCI-e
; To: Ben Menchaca; linuxppc-dev@ozlabs.org
> Subject: RE: 83xx: Marking or Allocating Pages as Cache-Inhibited
>
> Did you enable the snoop bit at PEX_WDMA_CTRL[SNOOP] and
> PEX_RDMA_CTRL[SNOOP]?
>
> What is the freq settings? CORE/CSB bus.
>
> Thanks, Dave
>
>
ev-bounces+daveliu=freescale@ozlabs.org
> > [mailto:linuxppc-dev-bounces+daveliu =
> freescale@ozlabs.org]
> > On Behalf Of Liu Dave-R63238
> > Sent: Friday, March 06, 2009 1:22 PM
> > To: Ben Menchaca; linuxppc-dev@ozlabs.org
> > Subject: RE: 83xx: Marking
iu> =freescale@ozlabs.org]
> On Behalf Of Ben Menchaca
> Sent: Friday, March 06, 2009 12:33 PM
> To: linuxppc-dev@ozlabs.org
> Subject: 83xx: Marking or Allocating Pages as
Cache-Inhibited
could you try to set '1' to DMA description bit3?
From: Liu Dave-R63238
Sent: Friday, March 06, 2009 1:41 PM
To: 'Ben Menchaca'
Cc: linuxppc-dev@ozlabs.org
Subject: RE: 83xx: Marking or Allocating Page
nuxppc-dev@ozlabs.org
> *Subject:* Re: 83xx: Marking or Allocating Pages as Cache-Inhibited
>
> 1. BAT2 in linux is set to WIMG=0010, and covers all 64M
> 2. PEX_DEVICE_CONTROL in PCI-E Config Space (0x54): 0x1020
> 3. PEX_xDMA_CTRL is set to 0x0401 at the initiation of the D
n Menchaca;
linuxppc-dev@ozlabs.org
> Subject: RE: 83xx: Marking or
Allocating Pages as Cache-Inhibited
>
> Did you enable the snoop bit at
PEX_WDMA_CTRL[SNOOP] and
the descriptor bit 3 to have a try?
>
> --
> *From:* Ben Menchaca [mailto:ben.mench...@gmail.com]
> *Sent:* Friday, March 06, 2009 2:10 PM
>
> *To:* Liu Dave-R63238
> *Cc:* linuxppc-dev@ozlabs.org
> *Subject:* Re: 83xx: Marking or Allocating Pages as Cac
>> *To:* Liu Dave-R63238
>> *Cc:* linuxppc-dev@ozlabs.org
>> *Subject:* Re: 83xx: Marking or Allocating Pages as Cache-Inhibited
>>
>> I can look at ACR morning...although I can say with a fair amount of
>> certainty that I have not changed it from the PO
lto:ben.mench...@gmail.com]
> Sent: Friday, March 06, 2009 1:38 PM
> To: Liu Dave-R63238
> Cc: linuxpp
On Sat, Mar 7, 2009 at 3:51 PM, Benjamin Herrenschmidt <
b...@kernel.crashing.org> wrote:
> On Fri, 2009-03-06 at 10:12 -0600, Ben Menchaca wrote:
> > Testing now...it looks like it (almost) works, though! Why does
> > setting no-snoop cause snooping to work? More on the effect on
> > setting th
On Fri, Mar 6, 2009 at 12:49 AM, Liu Dave-R63238 wrote:
> could you try to set '1' to DMA description bit3?
Dave,
I'm looking at the 8315e reference manual. What is "DMA description bit 3"?
--
Timur Tabi
Linux kernel developer at Freescale
___
Linux
; Cc: Ben Menchaca; linuxppc-dev@ozlabs.org
> Subject: Re: 83xx: Marking or Allocating Pages as Cache-Inhibited
>
> On Fri, Mar 6, 2009 at 12:49 AM, Liu Dave-R63238
> wrote:
> > could you try to set '1' to DMA description bit3?
>
> Dave,
>
> I'm looking
c: linuxppc-dev@ozlabs.org
Subject: Re: 83xx: Marking or Allocating Pages as
Cache-Inhibited
Thank you for your help! That bit resolved all of the RDMA/WDMA
coherency issues on the CSB side...except:
We expose a 1MB region of memory from CSB via a BAR (BAR1
c: linuxppc-dev@ozlabs.org
Subject: Re: 83xx: Marking or Allocating Pages as
Cache-Inhibited
Thank you for your help! That bit resolved all of the RDMA/WDMA
coherency issues on the CSB side...except:
We expose a 1MB region of memory from CSB via a BAR (BAR1
rote:
>>
>>> Did you enable the descriptor bit 3 to have a try?
>>>
>>> ----------
>>> *From:* Ben Menchaca [mailto:ben.mench...@gmail.com]
>>> *Sent:* Friday, March 06, 2009 2:10 PM
>>>
>>> *To:* Liu Dave-R63238
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