Hello,
On Wed, Jun 17, 2009 at 2:16 PM, Norbert van
Bolhuisnvbolh...@aimvalley.nl wrote:
I'll be testing the design tomorrow on the reference board, I'll
report results in this thread.
Interesting.
Looking forward to the results.
Design works as expected on the now slightly modified
Hi Leon,
I'll be testing the design tomorrow on the reference board, I'll
report results in this thread.
Interesting.
Looking forward to the results.
Design works as expected on the now slightly modified MPC8313E-RDB
board.
That's great!
Kudos to David.
I'm sure you would have come up
Hi Leon,
I doubt if there are working designs for this.
In u-boot the watchdog (if enabled with CONFIG_WATCHDOG) is normally
strobed in the decrementer interrupt routine (timer_interrupt). So
I guess there's not a big chance it triggers a reset.
It is possible to configure the WD to issue a
Hello all,
On Wed, Jun 17, 2009 at 10:35 AM, Norbert van
Bolhuisnvbolh...@aimvalley.nl wrote:
Hi Leon,
I doubt if there are working designs for this.
...
In u-boot the watchdog (if enabled with CONFIG_WATCHDOG) is normally
strobed in the decrementer interrupt routine (timer_interrupt). So
Hello,
On Wed, Jun 17, 2009 at 12:09 PM, Leon
Woestenbergleon.woestenb...@gmail.com wrote:
Quoting David Hawkins, who gave a very clear explanation:
...
If you have the Flash BUSY# signal, then this scheme works
great, since using HRESET# low and BUSY# low to create a
PORESET# source is only
Hi Leon,
...
Most designs do not care about the watchdog, or only pet in their
non-critical paths... That's not what the watchdog is for.
Also, I don't care about u-boot.
I care about a design where the Flash NOR could be in write mode at
any time when the watchdog triggers, when the hardware
Hello,
this is a hardware, even board issue, but I hope to find the right
target audience here.
In our MPC83xx design I would like to prevent dead lock in case where
a field upgrade is performed, i.e. NOR Flash is erased or written, and
the MPC83xx built-in hardware watchdog triggers.
In
Hi Leon,
Most MPC8xxx board designs I have seen suffer from this possible dead lock:
- NOR Flash is put in erase mode or write mode
- Hardware watchdog triggers
- HRESET# is asserted by the processor, during which the configuration
words are read from NOR Flash.
Either
HRESET# is not attached
Hello,
On Tue, Jun 16, 2009 at 6:30 PM, David Hawkinsd...@ovro.caltech.edu wrote:
Most MPC8xxx board designs I have seen suffer from this possible dead
lock:
- NOR Flash is put in erase mode or write mode
- Hardware watchdog triggers
- HRESET# is asserted by the processor, during which the
Hi Leon,
Most MPC8xxx board designs I have seen suffer from this possible dead
lock:
- NOR Flash is put in erase mode or write mode
- Hardware watchdog triggers
- HRESET# is asserted by the processor, during which the configuration
words are read from NOR Flash.
Either
HRESET# is not attached
10 matches
Mail list logo
