Re: [PATCH v2 4/4] KVM: PPC: Bookehv: Get vcpu's last instruction for emulation

2014-05-02 Thread Alexander Graf
On 05/01/2014 02:45 AM, Mihai Caraman wrote: On bookehv vcpu's last instruction is read using load external pid (lwepx) instruction. lwepx exceptions (DTLB_MISS, DSI and LRAT) need to be handled by KVM. These exceptions originate from host state (MSR[GS] = 0) which implies additional checks in

RE: [PATCH v2 4/4] KVM: PPC: Bookehv: Get vcpu's last instruction for emulation

2014-05-02 Thread David Laight
From: Alexander Graf ... + page = pfn_to_page(pfn); + eaddr = (unsigned long)kmap_atomic(page); + eaddr |= addr ~PAGE_MASK; + *instr = *(u32 *)eaddr; + kunmap_atomic((u32 *)eaddr); I think I'd rather write this as *instr = *(u32 *)(eaddr | (addr ~PAGE));

Re: [PATCH v2 4/4] KVM: PPC: Bookehv: Get vcpu's last instruction for emulation

2014-05-02 Thread Alexander Graf
On 05/02/2014 12:12 PM, David Laight wrote: From: Alexander Graf ... + page = pfn_to_page(pfn); + eaddr = (unsigned long)kmap_atomic(page); + eaddr |= addr ~PAGE_MASK; + *instr = *(u32 *)eaddr; + kunmap_atomic((u32 *)eaddr); I think I'd rather write this as

Re: [PATCH v2 4/4] KVM: PPC: Bookehv: Get vcpu's last instruction for emulation

2014-05-02 Thread Scott Wood
On Fri, 2014-05-02 at 13:10 +0200, Alexander Graf wrote: On 05/02/2014 12:12 PM, David Laight wrote: You also probably want the page mapped uncached - no point polluting the data cache. We can't do that without creating an architecturally illegal alias between cacheable and non-cacheable