Subject: Question about MPIC_SINGLE_DEST_CPU on P1020 (e500 core) SMP
Hi
The P1020 manual states (in the PIC chapter) that in the Internal
Interrupt Destination register, only 1 CPU (and not both) can be
selected as the IRQ destination. How then can we achieve interrupt
spraying for the
On 06/10/2012 03:37 PM, Gopalakrishnan Raman wrote:
Hi
The P1020 manual states (in the PIC chapter) that in the “Internal
Interrupt Destination” register, only 1 CPU (and not both) can be
selected as the IRQ destination.
Right.
How then can we achieve “interrupt
spraying” for the PCI
