Re: [PATCH v6 10/11] cpuidle/powernv: Add support for POWER ISA v3 idle states

2016-06-14 Thread Shreyas B Prabhu
On 06/14/2016 04:59 PM, Benjamin Herrenschmidt wrote: > On Tue, 2016-06-14 at 16:17 +0530, Shreyas B Prabhu wrote: > >> >> I ignored adding this check because this is part of initcall and we are >> unlikely to run out of memory at this state. But I'll add the check in >> next version. > > Why d

Re: [PATCH v6 10/11] cpuidle/powernv: Add support for POWER ISA v3 idle states

2016-06-14 Thread Benjamin Herrenschmidt
<1465404871-5406-11-git-send-email-shre...@linux.vnet.ibm.com> <1465854492.3022.30.ca...@au1.ibm.com> <575fe64c.9080...@linux.vnet.ibm.com> Organization: IBM Australia Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.20.3 (3.20.3-1.fc24) Mime-Ve

Re: [PATCH v6 10/11] cpuidle/powernv: Add support for POWER ISA v3 idle states

2016-06-14 Thread Benjamin Herrenschmidt
On Tue, 2016-06-14 at 16:17 +0530, Shreyas B Prabhu wrote: > > I ignored adding this check because this is part of initcall and we are > unlikely to run out of memory at this state. But I'll add the check in > next version. Why do you malloc the u64 array and not the string pointer array ? Shoul

Re: [PATCH v6 10/11] cpuidle/powernv: Add support for POWER ISA v3 idle states

2016-06-14 Thread Shreyas B Prabhu
On 06/14/2016 03:18 AM, Benjamin Herrenschmidt wrote: > On Wed, 2016-06-08 at 11:54 -0500, Shreyas B. Prabhu wrote: >> >> /* >> * States for dedicated partition case. >> */ >> @@ -167,6 +183,8 @@ static int powernv_add_idle_states(void) >> int nr_idle_states = 1; /* Snooze */ >> in

Re: [PATCH v6 10/11] cpuidle/powernv: Add support for POWER ISA v3 idle states

2016-06-14 Thread Shreyas B Prabhu
On 06/13/2016 09:04 PM, Daniel Lezcano wrote: > On Wed, Jun 08, 2016 at 11:54:30AM -0500, Shreyas B. Prabhu wrote: >> POWER ISA v3 defines a new idle processor core mechanism. In summary, >> a) new instruction named stop is added. >> b) new per thread SPR named PSSCR is added which controls the

Re: [PATCH v6 10/11] cpuidle/powernv: Add support for POWER ISA v3 idle states

2016-06-13 Thread Benjamin Herrenschmidt
On Wed, 2016-06-08 at 11:54 -0500, Shreyas B. Prabhu wrote: > >  /* >   * States for dedicated partition case. >   */ > @@ -167,6 +183,8 @@ static int powernv_add_idle_states(void) >   int nr_idle_states = 1; /* Snooze */ >   int dt_idle_states; >   u32 *latency_ns, *residency_ns, *fla

Re: [PATCH v6 10/11] cpuidle/powernv: Add support for POWER ISA v3 idle states

2016-06-13 Thread Daniel Lezcano
On Wed, Jun 08, 2016 at 11:54:30AM -0500, Shreyas B. Prabhu wrote: > POWER ISA v3 defines a new idle processor core mechanism. In summary, > a) new instruction named stop is added. > b) new per thread SPR named PSSCR is added which controls the behavior > of stop instruction. > > Supported