Allen Curtis wrote:
>> On Jun 15, 2005, at 9:24 AM, Jason McMullan wrote:
>>
>>> My personal opinions:
>>>
>>> * Use macro-offsets into a cpm2_map_t struct
>>
>>
>> Not going to happen. Sorry.
>>
>
> Interesting... So are you thinking of eliminating the cpm_map_t
> structure all together?
I
I did once ran lmbench on a proprietry 850 based board running at
62/31 Mhz
using 1 16-bit dram:
Context switching - times in microseconds - smaller is better
-
Host OS 2p/0K 2p/16K 2p/64K 8p/16K 8p/64K 16p/16K 16p/
64K
On Jun 15, 2005, at 11:43 AM, Schaefer-Hutter, Peter wrote:
> I basically used the two programs from
> http://www.ibm.com/developerworks/linux/library/l-rt9/
That's a fine test, if you run it on various systems and
compare the _relative_ results. There is more than
context switching going on he
On Jun 15, 2005, at 9:14 AM, Samuel Osorio Calvo wrote:
> Currently I have multicast working just be moving the return
> statement. It seems to work but I guess I did not face yet the
> problems that caused the code to be commented.
> Let's say it works in an unreliable way
When I wrote th
Kumar Gala wrote:
>
> On Jun 15, 2005, at 10:31 AM, Vitaly Bordug wrote:
>
>> Kumar Gala wrote:
>>
>>>
>>> On Jun 15, 2005, at 2:55 AM, Vitaly Bordug wrote:
>>>
Kumar,
I assume this as a IMMR enumerating you promised to help with. Is
it in
the final state? And what was the rea
Kumar Gala wrote:
>
> On Jun 15, 2005, at 2:55 AM, Vitaly Bordug wrote:
>
>> Kumar,
>> I assume this as a IMMR enumerating you promised to help with. Is it in
>> the final state? And what was the reason of fcc_regs_c removal?
>> I'm also going to change the files name to cpm2_.. .
>
>
> Yes, I rem
Hi:
I used HY57641620 * 2 at my MPC852T, the ram size is 16M, Now i want
to change to AMIC A43L3616-6 * 2 32M.
I modify my ppboot's as follow, but i don't know how to modfiy my
sdram_table, anybody know what's the meaning of sdram_table?
PS:I system hold at ## Starting linux kernel at 0x
> Maybe it would help if you gave more detail about how
> you are measuring these times in your system.
I basically used the two programs from
http://www.ibm.com/developerworks/linux/library/l-rt9/
since running lmbench is currently not an option;
however, i'm looking into creating a nfs filesys
Hi Peter,
linuxppc-embedded-bounces at ozlabs.org wrote on :
> i'm evaluating IPC on the MPC885ADS and discovered
> that the context switching times seem to be quite
> disappointing (up to 1ms). As we need to do a lot
..
> Or is this the expected context switching time for
> CPU @ 100 MHz (RAM @
Hi all,
i'm evaluating IPC on the MPC885ADS and discovered
that the context switching times seem to be quite
disappointing (up to 1ms). As we need to do a lot
of IPC later on, i'm interested bringing the time
down.
Therefore i wonder, if there are any known problems
with the MMU on 8xx and 2.
I have a patched 2.4.25 kernel with changes from the Denx kernel, the
lck1 patchset (O(1) scheduler, preempt and lowlatency patches), linux
trace toolkit patches (sort of handcrafted) and proprietary board
specific patches.
It's probably incompatible with anything else. I can however make a
Hi,
I found the solution for my problem : i have to configure theSIU Interrupt
Edge/Level Register (SIEL)like that :
((immap_t *)IMAP_ADDR)->im_siu_conf.sc_siel |= 0x0002; // for IRQ7
The SIMASK register was right.
Sophie.
> Hi all,
>
> I wrote a module driver to manage interruptions. I
Hi all,
Do any of you know where to find these patches for kernel 2.4.25 coming with
ELDK's v.3.1.1?
I've seen the RTAI patch for it but nothing about preemptive or low-latency..
Will patches from "standard" distribution's kernels be compatible?? If so,
would you, please, provide a link.;
Hi, Alex!
Hmm, I don't know the PM828 much in detail, but have you
tried the "generic" physmap driver which is in the kernel?
Just give it the base address and the size, and it should
probe the cfi and you are done (well, it was working fine
for me on my PM854).
Of course, you need to make sure, t
Currently I have multicast working just be moving the return statement. It
seems to work but I guess I did not face yet the problems that caused the code
to be commented.
Let's say it works in an unreliable way
Samuel.
Unclassified.
>>> Alex Zeffertt 06/14/05 10:31AM >>>
On Mon, 13 Jun 2
> > Linuxppc-embedded mailing list
> > Linuxppc-embedded at ozlabs.org
> > https://ozlabs.org/mailman/listinfo/linuxppc-embedded
> >
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On Tue, 2005-06-07 at 22:06, Benjamin Herrenschmidt wrote:
> It's basically used to extract some infos directly from the flattened
> tree in order to construct the LMB list (list of memory blocks,
> equivalent of ppc32's mem_pieces),
OK. So the unflattenting process requires a small amount
of
Thank you,
but on the MPC885 IRQ7 is the only one function for this pin. On the other
hand, we have a problem in the kernel that calibrate the delay loop because
it found 2.17 BogoMIPS (instead of 50 or 80 BogoMIPS).
Could it explain the problem for the interruption ? (even if the
application wor
hi,all,
I am a newer.I worked on a platform based on MPC8248.
The 64M SDRAM use CS2,and it's base address is
0x,BR2=0x0041,OR2=fc002cd0.
It's just a simple issue,I want to change the base address of the SDRAM from
0x to 0x0300,I thought change the BR2 register to 0x034
_
> Linuxppc-embedded mailing list
> Linuxppc-embedded at ozlabs.org
> https://ozlabs.org/mailman/listinfo/linuxppc-> embedded
>
>
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>Now, I am trying to boot Linux over the network using the following
boot arguments:
>Kernel command line: console=ttyS0,9600n8 console=tty0 root=/dev/nfs rw
nfsroot=
>192.168.49.189:/home/proj/at921/Filesys/usr/local/gefnes/target
>192.168.49.1:192.168.49.189::255.255.255.0::eth0:off da104_gpio=8
Kumar,
I assume this as a IMMR enumerating you promised to help with. Is it in
the final state? And what was the reason of fcc_regs_c removal?
I'm also going to change the files name to cpm2_.. .
Allen,
I'll provide a patch containing these platform stuff together with
platform-specific device st
Pins on the 8xx are highly configurable. I recommend that you check
that the pin has not been configured for another function. For example
on the 862 the SIU_IRQ7 pin doubles as the MII tx clock.
Alex
On Wed, 15 Jun 2005 10:35:41 +0200
scarayol at assystembrime.com wrote:
> Hi all,
>
> I wro
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>Hi all,
>
>i'm evaluating IPC on the MPC885ADS and discovered
>that the context switching times seem to be quite
>disappointing (up to 1ms). As we need to do a lot
>of IPC later on, i'm interested bringing the time
>down.
>
>Therefore i wonder, if there are any known problems
>with the MMU on
thanks.
That was it. Too much dirt in my eyes today.
My U-boot script that builds the bootargs was wrong.
-Original Message-
From: Steven Blakeslee [mailto:[EMAIL PROTECTED]
Sent: Wednesday, June 15, 2005 4:59 PM
To: Barbier, Renaud (GE Infrastructure); linuxppc-embedded at ozlabs.org
Sub
> On Jun 15, 2005, at 9:24 AM, Jason McMullan wrote:
>
>> My personal opinions:
>>
>> * Use macro-offsets into a cpm2_map_t struct
>
> Not going to happen. Sorry.
>
Interesting... So are you thinking of eliminating the cpm_map_t
structure all together?
>> * Put fcc_c regs back in
>
>
On Jun 15, 2005, at 10:31 AM, Vitaly Bordug wrote:
> Kumar Gala wrote:
>
>>
>> On Jun 15, 2005, at 2:55 AM, Vitaly Bordug wrote:
>>
>>> Kumar,
>>> I assume this as a IMMR enumerating you promised to help with. Is it
>>> in
>>> the final state? And what was the reason of fcc_regs_c removal?
>>> I
Hi all,
I wrote a module driver to manage interruptions. I have an interruption on
MPC885 IRQ7 activated by a push button that provides a negative pulse of
200 ns width.
When the device is open, i call request_irq() to install the interrupt
handler:
int ret = request_irq(SIU_IRQ7, fpgadriver_irq_
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I have a 440GX based board running Linux 2.4.26
I have successfully booted over the network by setting the boot argument to
Kernel command line: console=ttyS0,9600n8 root=/dev/nfs rw ip=bootp da104_gpio=8
IP: routing cache hash table of 2048 buckets, 16Kbytes
TCP: Hash tables configured (establi
On Jun 15, 2005, at 9:24 AM, Jason McMullan wrote:
> My personal opinions:
>
> * Use macro-offsets into a cpm2_map_t struct
Not going to happen. Sorry.
> * Put fcc_c regs back in
Can you explain this. I'm not 100% sure what regs you are referring to.
> * dpram[PROFF_*] sho
On Jun 15, 2005, at 9:33 AM, Jason McMullan wrote:
> On Wed, 2005-06-15 at 09:25 -0500, Kumar Gala wrote:
>> Yes, I removed the fcc_regs_c since its not always true. Please don't
>> rename the file to cpm2_. I think I'm going to end up renaming them
>> to
>> pq2_ since that is the most appropr
On Jun 14, 2005, at 11:41 PM, Allen Curtis wrote:
I've also included our version of this patch for commentary. Did you
see a
need for the following to actually be devices? (DMA, CPM, SI1,
> SIC2).
>>> The good thing about them actually being devices is that you can find
>>> th
>> I'm trying to stay away from basing things on the structure. Since
>> the offsets are truly fixed I see not reason to try to make sure that
>> the immap structure is always correct for all cases. Hopefully this
>> will end up removing the need to ifdef the immap structure as we go
>> forward.
On Jun 15, 2005, at 2:55 AM, Vitaly Bordug wrote:
> Kumar,
> I assume this as a IMMR enumerating you promised to help with. Is it in
> the final state? And what was the reason of fcc_regs_c removal?
> I'm also going to change the files name to cpm2_.. .
Yes, I removed the fcc_regs_c since its no
> Hi:
>
> I used HY57641620 * 2 at my MPC852T, the ram size is 16M, Now i want
> to change to AMIC A43L3616-6 * 2 32M.
>
> I modify my ppboot's as follow, but i don't know how to modfiy my
> sdram_table, anybody know what's the meaning of sdram_table?
>
The sdram_table is used to load th
> hi,all,
> I am a newer.I worked on a platform based on MPC8248.
> The 64M SDRAM use CS2,and it's base address is
0x,BR2=0x0041,OR2=fc002cd0.
> It's just a simple issue,I want to change the base address of the SDRAM
from 0x to 0x0300,I thought change the BR2 register to
0
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