> Hi Jeff,
>
> Thanks for your reply.
>
> > Does it work for you in polling mode? If not, you probably have a
> problem with the way you are accessing the system ace - cache,
> endianess, byte alignment, etc. If it does work in polling, the usual
> suspects are interrupt masking errors or some
Hello,
Can anyone help with my questions on platform flash for Xilinx ML403?
>From what I understand, I can use platform flash to store my FPGA bitstream
file and my software application elf file, so it's like using an ACE file
through the CompactFlash, except I just need to set the configuratio
You may need to configure the board in PCI agent mode so that it can
respond to the PCI configuration cycles. By fefault, it might come
in master mode ( wherein it generates the PCI cycles and configures
other devices in its PCI bus)
It should be a hardware configuration option. So you should s
Title: Problem with External/PCI interrupts in MPC85xx
Hi,
We are having trouble receiving some external interrupts on our MPC8541E processor. Our board and kernel image are loosely based on the MPC8540_ADS freescale design. Our embedded system is not used as a plug-in card. We are using the
Hi Tim,
> I am trying to develop a windows driver for the MPC8349MDS board but
> Windows does not seem to acknowledge the existence of the board in the
> pci slot. The device manager does not see the board and no resources
> are allocated on boot.
If no resources are allocated on boot, then i
I am trying to develop a windows driver for the MPC8349MDS board but Windows does not seem to acknowledge the existence of the board in the pci slot. The device manager does not see the board and no resources are allocated on boot. Running Linux as my OS works perfectly. I have tried both Window
Hi Ameet, Thanks for the instant reply. I changed root parameter to xsa as you suggested root=/dev/xsa2. But i still get the same failure. [ 3.093694] TCP bic registered[ 3.129458] NET: Registered protocol family 8[ 3.181412] NET: Registered protocol family 20[ 3.236744] VFS: Canno
Hi,
we have
troubles with our 256 MBytes DDR SDRAM on our mpc5200B custom
board.
On this processor we
have four chips, 64 MBytes each connected via chipselects CS0 &
CS1.
When running a specific memory test under u-boot the CS1
connected RAM seems also to work fine (memcpy, memcmp, etc.
Hi,
Please ignore my last mail.
The problem has been resolved.
Thanks and Regards,
Sachin Rane
From: Sachin RaneSent: Tue 10/3/2006 1:40 AMTo: linuxppc-embedded@ozlabs.orgSubject: Kerenl OOPS on insertion of driver module
Hi,
I am trying to write an I2C EEPROM chip driver.
I am using
System.map file
for a reference.
Regards,
Sachin Rane
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Hi Pradeep,
Pradeep Sampath wrote:
> Hello Ameet/Ming!
>
> I am running linux kernel 2.6 on a ML403. Your posts on the list was
> extremely helpful and saved a lot of time. But i have ran into a
> number of issues and need your help. I have described both the scenarios.
>
> Problem 1:
> I fo
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