Hi all ...
I am uploading the source code which is doing the following :-
1. mapping cpld register using ioremap coping the data to circular buffer
and remapping it to user space .
2. It can also map kernel virtual dma memory to user space if compiled
conditionally .
following is the problem
On Thursday 24 July 2008, Misbah khan wrote:
Hi all ...
I am uploading the source code which is doing the following :-
1. mapping cpld register using ioremap coping the data to circular buffer
and remapping it to user space .
2. It can also map kernel virtual dma memory to user space
Dear All,
I have done a design using EDK 8.2 using Hard_Temac IP component. In the EDK
9.2 there is a new idea to use ll_temac in conjunction with ll_fifo or
ll_dma. So far I was using happily the linux kernel by Grant Likey.
Unfortunately it does not deal with ll_temac. I have download the
Mirek,
I'm currently using the driver (CONFIG_XILINX_LLTEMAC) with the DMA
portion with no problem, which is what you kind of eluded to. From what
I've seen, the drver source does support the FIFO portion. It just
relies on having the proper definition for the TEMAC in either the DTS
or the
Hi Mirek,
We are not currently testing the LL TEMAC driver with the LL FIFO. We
only test with the DMA configuration. I also realize this may not be
documented that well and we may need to work on that.
Our reasoning is that in the Virtex5 FXT devices the DMA is hard so that
it does not cost any