Low-power mode implementation for Lite5200b. (Most of devices
on board, including the CPU, are powered down)
Some I/O registers are also saved here.
A patch to U-Boot that wakes up SDRAM, and transfers control
to address saved at physical 0x0 is needed, and is already
merged in
On 4/17/07, Domen Puncer [EMAIL PROTECTED] wrote:
Low-power mode implementation for Lite5200b. (Most of devices
on board, including the CPU, are powered down)
Some I/O registers are also saved here.
A patch to U-Boot that wakes up SDRAM, and transfers control
to address saved at physical
On 3/26/07, Domen Puncer [EMAIL PROTECTED] wrote:
On 22/03/07 08:41 +0100, Domen Puncer wrote:
On 15/03/07 17:36 +0100, Domen Puncer wrote:
Well... the code is only applicable for Lite5200b/mpc5200
and numbers are from specs.
And it's shorter than mpc52xx_find_and_map() lines.
I
On 15/03/07 17:36 +0100, Domen Puncer wrote:
On 15/03/07 08:09 -0600, Grant Likely wrote:
On 3/15/07, Domen Puncer [EMAIL PROTECTED] wrote:
...
+ /* map registers */
+ mbar = ioremap_nocache(0xf000, 0x8000);
Magic numbers? Really? This should be retrieved from the
Low-power mode implementation for Lite5200b.
Some I/O registers are also saved here.
A patch to U-Boot that wakes up SDRAM, and transfers control
to address saved at physical 0x0 is needed.
Signed-off-by: Domen Puncer [EMAIL PROTECTED]
---
arch/powerpc/platforms/52xx/Makefile |3
On 3/15/07, Domen Puncer [EMAIL PROTECTED] wrote:
Low-power mode implementation for Lite5200b.
Some I/O registers are also saved here.
A patch to U-Boot that wakes up SDRAM, and transfers control
to address saved at physical 0x0 is needed.
I don't see any structural problems with this code,
On 15/03/07 08:09 -0600, Grant Likely wrote:
On 3/15/07, Domen Puncer [EMAIL PROTECTED] wrote:
Low-power mode implementation for Lite5200b.
Some I/O registers are also saved here.
A patch to U-Boot that wakes up SDRAM, and transfers control
to address saved at physical 0x0 is needed.
I
