I think i have found the cause.
my DPLL is accessed by SPI, though frequency adjustment is only writing to
one register, it takes about 1.2 seconds!
so everytime after servo calculates the the ppb, it takes 1.2 seconds to
make ppb change, during that time,  the master offset
has already shifted a lot.  that's why the result is totally different from
simulation.

Thanks
Alex

Hamilton Alex <alexzanda...@gmail.com> 于2022年9月3日周六 12:54写道:

> what i have verified is:
> 1. Use syncE mode, so don't need to adjust frequency, use linuxptp to
> adjust phase offset only, everything works fine.
> 2. manually test frequency adjust function and it works well, let the
> board run in freerun mode, can manually adjust frequency and phase to make
> phase offset within +/- 10NS.
> 3. use linuxptp servo for frequency adjustment, it can't converge.
>
> Richard Cochran <richardcoch...@gmail.com> 于2022年9月3日周六 10:57写道:
>
>> On Sat, Sep 03, 2022 at 08:09:14AM +0800, Hamilton Alex wrote:
>>
>> > I didn't use custom vendor linux driver, Zarlink provided steps to
>> adjust
>> > its DPLL frequency and I implement
>> > it by my self.
>>
>> Oh, well, in that case, probably your own custom driver has a bug.
>>
>> Good luck,
>> Richard
>>
>
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