@@ -71,7 +71,8 @@ void GPUToSPIRVPass::runOnOperation() {
std::unique_ptr target =
spirv::getMemorySpaceToStorageClassTarget(*context);
spirv::MemorySpaceToStorageClassMap memorySpaceMap =
- spirv::mapMemorySpaceToVulkanStorageClass;
+ th
@@ -811,8 +812,13 @@ LogicalResult
ConvertAllocOpToGpuRuntimeCallPattern::matchAndRewrite(
// descriptor.
Type elementPtrType = this->getElementPtrType(memRefType);
auto stream = adaptor.getAsyncDependencies().front();
+
+ auto isHostShared = rewriter.create(
+ loc
@@ -811,8 +812,13 @@ LogicalResult
ConvertAllocOpToGpuRuntimeCallPattern::matchAndRewrite(
// descriptor.
Type elementPtrType = this->getElementPtrType(memRefType);
auto stream = adaptor.getAsyncDependencies().front();
+
+ auto isHostShared = rewriter.create(
+ loc
https://github.com/nbpatel edited
https://github.com/llvm/llvm-project/pull/65539
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@@ -811,8 +812,13 @@ LogicalResult
ConvertAllocOpToGpuRuntimeCallPattern::matchAndRewrite(
// descriptor.
Type elementPtrType = this->getElementPtrType(memRefType);
auto stream = adaptor.getAsyncDependencies().front();
+
+ auto isHostShared = rewriter.create(
+ loc
Jianhui-Li wrote:
> > We really just need a "mlir-runner" with target-platform as command
> > parameters.
>
> What kind of "target-platform" command parameters do you have in mind? (other
> than what we do now)
The current way of mlir-cpu-runner using the share library name to indicate
targe
@@ -811,8 +812,13 @@ LogicalResult
ConvertAllocOpToGpuRuntimeCallPattern::matchAndRewrite(
// descriptor.
Type elementPtrType = this->getElementPtrType(memRefType);
auto stream = adaptor.getAsyncDependencies().front();
+
+ auto isHostShared = rewriter.create(
+ loc
@@ -0,0 +1,70 @@
+//===- SerializeToSPIRV.cpp - Convert GPU kernel to SPIRV blob
-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Ap
Jianhui-Li wrote:
> > At some point it would be nice to have some design document or
> > documentation somewhere explaining how all these MLIR runners works,
> > including this one.
>
> The idea is to eventually consolidate all runners into one. This PR is just
> another piece of the puzzle.
rengolin wrote:
CI failure looks like Buildkite issue?
```
$ /etc/buildkite-agent/hooks/pre-checkout
--
| BUILDKITE_REPO: https://github.com/llvm/llvm-project.git
| fatal: not a git repository (or any parent up to mount point /var/lib)
| Stopping at filesystem boundary (GIT_DISCOVERY_ACROSS
rengolin wrote:
> At some point it would be nice to have some design document or documentation
> somewhere explaining how all these MLIR runners works, including this one.
The idea is to eventually consolidate all runners into one. This PR is just
another piece of the puzzle.
Once we're all h
https://github.com/grypp edited https://github.com/llvm/llvm-project/pull/65539
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@@ -811,8 +812,13 @@ LogicalResult
ConvertAllocOpToGpuRuntimeCallPattern::matchAndRewrite(
// descriptor.
Type elementPtrType = this->getElementPtrType(memRefType);
auto stream = adaptor.getAsyncDependencies().front();
+
+ auto isHostShared = rewriter.create(
+ loc
@@ -0,0 +1,223 @@
+//===- SyclRuntimeWrappers.cpp - MLIR SYCL wrapper library ===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-
@@ -0,0 +1,68 @@
+# CMake find_package() module for SYCL Runtime
+#
+# Example usage:
+#
+# find_package(SyclRuntime)
keryell wrote:
Shouldn't it
```suggestion
# find_package(SYCLRuntime)
```
everywhere?
https://github.com/llvm/llvm-project/pull/65539
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https://github.com/llvm/llvm-project/pull/65539
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@@ -116,6 +116,7 @@
add_definitions(-DMLIR_ROCM_CONVERSIONS_ENABLED=${MLIR_ENABLE_ROCM_CONVERSIONS})
set(MLIR_ENABLE_CUDA_RUNNER 0 CACHE BOOL "Enable building the mlir CUDA
runner")
set(MLIR_ENABLE_ROCM_RUNNER 0 CACHE BOOL "Enable building the mlir ROCm
runner")
+set(MLIR_E
https://github.com/keryell commented:
Quite interesting!
At some point it would be nice to have some design document or documentation
somewhere explaining how all these MLIR runners works, including this one.
Globally this PR add a SYCL runner, but it is very specific for Intel Level 0.
It would
https://github.com/silee2 edited https://github.com/llvm/llvm-project/pull/65539
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https://github.com/jdoerfert edited
https://github.com/llvm/llvm-project/pull/65539
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