https://github.com/DavidSpickett closed
https://github.com/llvm/llvm-project/pull/70205
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DavidSpickett wrote:
>I think of old teenage mutant ninja turtles
No ninjas over here, only heroes :)
https://github.com/llvm/llvm-project/pull/70205
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@@ -488,6 +508,12 @@ bool RegisterInfoPOSIX_arm64::IsSMERegZA(unsigned reg)
const {
return reg == m_sme_regnum_collection[2];
}
+bool RegisterInfoPOSIX_arm64::IsSMERegZT(unsigned reg) const {
+ // ZT0 is part of the SME register set only if SME2 is present.
+ return
https://github.com/DavidSpickett updated
https://github.com/llvm/llvm-project/pull/70205
>From da28585bcb47732ee54e8bd8e5b483c797f9f1d8 Mon Sep 17 00:00:00 2001
From: David Spickett
Date: Tue, 3 Oct 2023 13:24:39 +0100
Subject: [PATCH 1/6] [lldb][AArch64] Add SME2's ZT0 register
SME2 is
@@ -624,6 +661,21 @@
NativeRegisterContextLinux_arm64::CacheAllRegisters(uint32_t _size) {
error = ReadZA();
if (error.Fail())
return error;
+
+// We will only be restoring ZT data if ZA is active. As writing to an
+// inactive ZT enables ZA, which may
@@ -580,7 +616,8 @@ enum RegisterSetType : uint32_t {
// Pointer authentication registers are read only, so not included here.
MTE,
TLS,
- SME, // ZA only, SVCR and SVG are pseudo registers.
+ SME, // ZA only , SVCR and SVG are pseudo registers.
https://github.com/DavidSpickett updated
https://github.com/llvm/llvm-project/pull/70205
>From da28585bcb47732ee54e8bd8e5b483c797f9f1d8 Mon Sep 17 00:00:00 2001
From: David Spickett
Date: Tue, 3 Oct 2023 13:24:39 +0100
Subject: [PATCH 1/5] [lldb][AArch64] Add SME2's ZT0 register
SME2 is
@@ -624,6 +661,21 @@
NativeRegisterContextLinux_arm64::CacheAllRegisters(uint32_t _size) {
error = ReadZA();
if (error.Fail())
return error;
+
+// We will only be restoring ZT data if ZA is active. As writing to an
+// inactive ZT enables ZA, which may
@@ -488,6 +508,12 @@ bool RegisterInfoPOSIX_arm64::IsSMERegZA(unsigned reg)
const {
return reg == m_sme_regnum_collection[2];
}
+bool RegisterInfoPOSIX_arm64::IsSMERegZT(unsigned reg) const {
+ // ZT0 is part of the SME register set only if SME2 is present.
+ return
https://github.com/jasonmolenda edited
https://github.com/llvm/llvm-project/pull/70205
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https://github.com/jasonmolenda approved this pull request.
Looks good to me, a few small comments inlined. Mostly the problem I have is
that every time I see "ZA" I think of old teenage mutant ninja turtles who
referred to pizza as "za" and it makes it very difficult to read this patch.
@@ -580,7 +616,8 @@ enum RegisterSetType : uint32_t {
// Pointer authentication registers are read only, so not included here.
MTE,
TLS,
- SME, // ZA only, SVCR and SVG are pseudo registers.
+ SME, // ZA only , SVCR and SVG are pseudo registers.
bulbazord wrote:
Looks fine to me, though I'm not an expert in this area. If nobody else reviews
or approves soon, I can do so.
https://github.com/llvm/llvm-project/pull/70205
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DavidSpickett wrote:
Rebased this to include the `IsPresent` change, otherwise it's the same as
before.
https://github.com/llvm/llvm-project/pull/70205
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https://github.com/DavidSpickett updated
https://github.com/llvm/llvm-project/pull/70205
>From da28585bcb47732ee54e8bd8e5b483c797f9f1d8 Mon Sep 17 00:00:00 2001
From: David Spickett
Date: Tue, 3 Oct 2023 13:24:39 +0100
Subject: [PATCH 1/4] [lldb][AArch64] Add SME2's ZT0 register
SME2 is
https://github.com/DavidSpickett updated
https://github.com/llvm/llvm-project/pull/70205
>From 80e01960f247ab9ee06daa59d9c033fda5fc3978 Mon Sep 17 00:00:00 2001
From: David Spickett
Date: Tue, 3 Oct 2023 13:24:39 +0100
Subject: [PATCH 1/4] [lldb][AArch64] Add SME2's ZT0 register
SME2 is
github-actions[bot] wrote:
:warning: C/C++ code formatter, clang-format found issues in your code.
:warning:
You can test this locally with the following command:
``bash
git-clang-format --diff 23d6a6dfc1bc6e79bdcc48a59a0698a5b79262e9
3ed10ca4d37abce5114fe22110b587a0c78d2d0a --
https://github.com/DavidSpickett updated
https://github.com/llvm/llvm-project/pull/70205
>From 80e01960f247ab9ee06daa59d9c033fda5fc3978 Mon Sep 17 00:00:00 2001
From: David Spickett
Date: Tue, 3 Oct 2023 13:24:39 +0100
Subject: [PATCH 1/3] [lldb][AArch64] Add SME2's ZT0 register
SME2 is
@@ -625,6 +662,18 @@
NativeRegisterContextLinux_arm64::CacheAllRegisters(uint32_t _size) {
error = ReadZA();
if (error.Fail())
return error;
+
+// We will only be restoring ZT data if ZA is active. As writing to an
+// inactive ZT enables ZA, which may
@@ -625,6 +662,18 @@
NativeRegisterContextLinux_arm64::CacheAllRegisters(uint32_t _size) {
error = ReadZA();
if (error.Fail())
return error;
+
+// We will only be restoring ZT data if ZA is active. As writing to an
+// inactive ZT enables ZA, which may
@@ -625,6 +662,18 @@
NativeRegisterContextLinux_arm64::CacheAllRegisters(uint32_t _size) {
error = ReadZA();
if (error.Fail())
return error;
+
+// We will only be restoring ZT data if ZA is active. As writing to an
+// inactive ZT enables ZA, which may
https://github.com/bulbazord edited
https://github.com/llvm/llvm-project/pull/70205
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DavidSpickett wrote:
I've pushed this as two commits the first is adding the register, the second
updates tests, for easier review. I intend to squash both once approved.
This does not cover core files, that'll be the follow up PR.
https://github.com/llvm/llvm-project/pull/70205
llvmbot wrote:
@llvm/pr-subscribers-lldb
Author: David Spickett (DavidSpickett)
Changes
SME2 is documented as part of the main SME supplement:
https://developer.arm.com/documentation/ddi0616/latest/
The one change for debug is this new ZT0 register. This register
contains data to be used
https://github.com/DavidSpickett created
https://github.com/llvm/llvm-project/pull/70205
SME2 is documented as part of the main SME supplement:
https://developer.arm.com/documentation/ddi0616/latest/
The one change for debug is this new ZT0 register. This register
contains data to be used with
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