Author: Pavel Labath Date: 2021-03-30T15:24:43+02:00 New Revision: ce03a862372a6f36d2fcf80dc80052aa155fcae8
URL: https://github.com/llvm/llvm-project/commit/ce03a862372a6f36d2fcf80dc80052aa155fcae8 DIFF: https://github.com/llvm/llvm-project/commit/ce03a862372a6f36d2fcf80dc80052aa155fcae8.diff LOG: [lldb] Remove linux/mips debugging support As discussed on lldb-dev <https://lists.llvm.org/pipermail/lldb-dev/2021-March/016777.html> the mips code is unmaintained and untested. It also carries a lot of technical debt which is not limited to mips-specific code. Generic mips support remains (and is going to be used by the upcoming freebsd code). Resurrecting mips support should be a matter of re-adding the relevant register context files (while avoiding reintroducing the debt). Added: Modified: lldb/source/Plugins/Process/Linux/CMakeLists.txt lldb/source/Plugins/Process/Utility/CMakeLists.txt lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_mips64.cpp lldb/source/Plugins/Process/Utility/RegisterInfos_mips64.h lldb/source/Plugins/Process/elf-core/ThreadElfCore.cpp lldb/test/API/functionalities/postmortem/elf-core/TestLinuxCore.py Removed: lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_mips64.cpp lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_mips64.h lldb/source/Plugins/Process/Utility/RegisterContextLinux_mips.cpp lldb/source/Plugins/Process/Utility/RegisterContextLinux_mips.h lldb/source/Plugins/Process/Utility/RegisterContextLinux_mips64.cpp lldb/source/Plugins/Process/Utility/RegisterContextLinux_mips64.h lldb/source/Plugins/Process/Utility/lldb-mips-linux-register-enums.h lldb/test/API/functionalities/postmortem/elf-core/linux-mips64el-gnuabi64.core lldb/test/API/functionalities/postmortem/elf-core/linux-mips64el-gnuabi64.out lldb/test/API/functionalities/postmortem/elf-core/linux-mips64el-gnuabin32.core lldb/test/API/functionalities/postmortem/elf-core/linux-mips64el-gnuabin32.out lldb/test/API/functionalities/postmortem/elf-core/linux-mipsel-gnuabio32.core lldb/test/API/functionalities/postmortem/elf-core/linux-mipsel-gnuabio32.out ################################################################################ diff --git a/lldb/source/Plugins/Process/Linux/CMakeLists.txt b/lldb/source/Plugins/Process/Linux/CMakeLists.txt index dd2a88957f48..a68ff4ffd822 100644 --- a/lldb/source/Plugins/Process/Linux/CMakeLists.txt +++ b/lldb/source/Plugins/Process/Linux/CMakeLists.txt @@ -3,7 +3,6 @@ add_lldb_library(lldbPluginProcessLinux NativeRegisterContextLinux.cpp NativeRegisterContextLinux_arm.cpp NativeRegisterContextLinux_arm64.cpp - NativeRegisterContextLinux_mips64.cpp NativeRegisterContextLinux_ppc64le.cpp NativeRegisterContextLinux_s390x.cpp NativeRegisterContextLinux_x86_64.cpp diff --git a/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_mips64.cpp b/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_mips64.cpp deleted file mode 100644 index 4c8ad65b66a3..000000000000 --- a/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_mips64.cpp +++ /dev/null @@ -1,1036 +0,0 @@ -//===-- NativeRegisterContextLinux_mips64.cpp -----------------------------===// -// -// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. -// See https://llvm.org/LICENSE.txt for license information. -// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception -// -//===----------------------------------------------------------------------===// - -#if defined(__mips__) - -#include "NativeRegisterContextLinux_mips64.h" - - -#include "Plugins/Process/Linux/NativeProcessLinux.h" -#include "Plugins/Process/Linux/Procfs.h" -#include "Plugins/Process/POSIX/ProcessPOSIXLog.h" -#include "Plugins/Process/Utility/RegisterContextLinux_mips.h" -#include "Plugins/Process/Utility/RegisterContextLinux_mips64.h" -#include "lldb/Core/EmulateInstruction.h" -#include "lldb/Host/Host.h" -#include "lldb/Host/HostInfo.h" -#include "lldb/Utility/DataBufferHeap.h" -#include "lldb/Utility/LLDBAssert.h" -#include "lldb/Utility/Log.h" -#include "lldb/Utility/RegisterValue.h" -#include "lldb/Utility/Status.h" -#include "lldb/lldb-enumerations.h" -#include "lldb/lldb-private-enumerations.h" -#define NT_MIPS_MSA 0x600 -#define CONFIG5_FRE (1 << 8) -#define SR_FR (1 << 26) -#define NUM_REGISTERS 32 - -#include <asm/ptrace.h> -#include <sys/ptrace.h> - -#ifndef PTRACE_GET_WATCH_REGS -enum pt_watch_style { pt_watch_style_mips32, pt_watch_style_mips64 }; -struct mips32_watch_regs { - uint32_t watchlo[8]; - uint16_t watchhi[8]; - uint16_t watch_masks[8]; - uint32_t num_valid; -} __attribute__((aligned(8))); - -struct mips64_watch_regs { - uint64_t watchlo[8]; - uint16_t watchhi[8]; - uint16_t watch_masks[8]; - uint32_t num_valid; -} __attribute__((aligned(8))); - -struct pt_watch_regs { - enum pt_watch_style style; - union { - struct mips32_watch_regs mips32; - struct mips64_watch_regs mips64; - }; -}; - -#define PTRACE_GET_WATCH_REGS 0xd0 -#define PTRACE_SET_WATCH_REGS 0xd1 -#endif - -#define W (1 << 0) -#define R (1 << 1) -#define I (1 << 2) - -#define IRW (I | R | W) - -#ifndef PTRACE_GETREGSET -#define PTRACE_GETREGSET 0x4204 -#endif -struct pt_watch_regs default_watch_regs; - -using namespace lldb_private; -using namespace lldb_private::process_linux; - -std::unique_ptr<NativeRegisterContextLinux> -NativeRegisterContextLinux::CreateHostNativeRegisterContextLinux( - const ArchSpec &target_arch, NativeThreadLinux &native_thread) { - return std::make_unique<NativeRegisterContextLinux_mips64>(target_arch, - native_thread); -} - -#define REG_CONTEXT_SIZE \ - (GetRegisterInfoInterface().GetGPRSize() + sizeof(FPR_linux_mips) + \ - sizeof(MSA_linux_mips)) - -// NativeRegisterContextLinux_mips64 members. - -static RegisterInfoInterface * -CreateRegisterInfoInterface(const ArchSpec &target_arch) { - if ((target_arch.GetMachine() == llvm::Triple::mips) || - (target_arch.GetMachine() == llvm::Triple::mipsel)) { - // 32-bit hosts run with a RegisterContextLinux_mips context. - return new RegisterContextLinux_mips( - target_arch, NativeRegisterContextLinux_mips64::IsMSAAvailable()); - } else { - return new RegisterContextLinux_mips64( - target_arch, NativeRegisterContextLinux_mips64::IsMSAAvailable()); - } -} - -NativeRegisterContextLinux_mips64::NativeRegisterContextLinux_mips64( - const ArchSpec &target_arch, NativeThreadProtocol &native_thread) - : NativeRegisterContextRegisterInfo( - native_thread, CreateRegisterInfoInterface(target_arch)) { - switch (target_arch.GetMachine()) { - case llvm::Triple::mips: - case llvm::Triple::mipsel: - m_reg_info.num_registers = k_num_registers_mips; - m_reg_info.num_gpr_registers = k_num_gpr_registers_mips; - m_reg_info.num_fpr_registers = k_num_fpr_registers_mips; - m_reg_info.last_gpr = k_last_gpr_mips; - m_reg_info.first_fpr = k_first_fpr_mips; - m_reg_info.last_fpr = k_last_fpr_mips; - m_reg_info.first_msa = k_first_msa_mips; - m_reg_info.last_msa = k_last_msa_mips; - break; - case llvm::Triple::mips64: - case llvm::Triple::mips64el: - m_reg_info.num_registers = k_num_registers_mips64; - m_reg_info.num_gpr_registers = k_num_gpr_registers_mips64; - m_reg_info.num_fpr_registers = k_num_fpr_registers_mips64; - m_reg_info.last_gpr = k_last_gpr_mips64; - m_reg_info.first_fpr = k_first_fpr_mips64; - m_reg_info.last_fpr = k_last_fpr_mips64; - m_reg_info.first_msa = k_first_msa_mips64; - m_reg_info.last_msa = k_last_msa_mips64; - break; - default: - assert(false && "Unhandled target architecture."); - break; - } - - // Initialize m_iovec to point to the buffer and buffer size using the - // conventions of Berkeley style UIO structures, as required by PTRACE - // extensions. - m_iovec.iov_base = &m_msa; - m_iovec.iov_len = sizeof(MSA_linux_mips); - - // init h/w watchpoint addr map - for (int index = 0; index <= MAX_NUM_WP; index++) - hw_addr_map[index] = LLDB_INVALID_ADDRESS; - - ::memset(&m_gpr, 0, sizeof(GPR_linux_mips)); - ::memset(&m_fpr, 0, sizeof(FPR_linux_mips)); - ::memset(&m_msa, 0, sizeof(MSA_linux_mips)); -} - -uint32_t NativeRegisterContextLinux_mips64::GetRegisterSetCount() const { - switch (GetRegisterInfoInterface().GetTargetArchitecture().GetMachine()) { - case llvm::Triple::mips64: - case llvm::Triple::mips64el: { - const auto context = static_cast<const RegisterContextLinux_mips64 &> - (GetRegisterInfoInterface()); - return context.GetRegisterSetCount(); - } - case llvm::Triple::mips: - case llvm::Triple::mipsel: { - const auto context = static_cast<const RegisterContextLinux_mips &> - (GetRegisterInfoInterface()); - return context.GetRegisterSetCount(); - } - default: - llvm_unreachable("Unhandled target architecture."); - } -} - -lldb::addr_t NativeRegisterContextLinux_mips64::GetPCfromBreakpointLocation( - lldb::addr_t fail_value) { - Status error; - RegisterValue pc_value; - lldb::addr_t pc = fail_value; - Log *log(ProcessPOSIXLog::GetLogIfAllCategoriesSet(POSIX_LOG_BREAKPOINTS)); - LLDB_LOG(log, "Reading PC from breakpoint location"); - - // PC register is at index 34 of the register array - const RegisterInfo *const pc_info_p = GetRegisterInfoAtIndex(gpr_pc_mips64); - - error = ReadRegister(pc_info_p, pc_value); - if (error.Success()) { - pc = pc_value.GetAsUInt64(); - - // CAUSE register is at index 37 of the register array - const RegisterInfo *const cause_info_p = - GetRegisterInfoAtIndex(gpr_cause_mips64); - RegisterValue cause_value; - - ReadRegister(cause_info_p, cause_value); - - uint64_t cause = cause_value.GetAsUInt64(); - LLDB_LOG(log, "PC {0:x} cause {1:x}", pc, cause); - - /* - * The breakpoint might be in a delay slot. In this case PC points - * to the delayed branch instruction rather then the instruction - * in the delay slot. If the CAUSE.BD flag is set then adjust the - * PC based on the size of the branch instruction. - */ - if ((cause & (1 << 31)) != 0) { - lldb::addr_t branch_delay = 0; - branch_delay = - 4; // FIXME - Adjust according to size of branch instruction at PC - pc = pc + branch_delay; - pc_value.SetUInt64(pc); - WriteRegister(pc_info_p, pc_value); - LLDB_LOG(log, "New PC {0:x}", pc); - } - } - - return pc; -} - -const RegisterSet * -NativeRegisterContextLinux_mips64::GetRegisterSet(uint32_t set_index) const { - if (set_index >= GetRegisterSetCount()) - return nullptr; - - switch (GetRegisterInfoInterface().GetTargetArchitecture().GetMachine()) { - case llvm::Triple::mips64: - case llvm::Triple::mips64el: { - const auto context = static_cast<const RegisterContextLinux_mips64 &> - (GetRegisterInfoInterface()); - return context.GetRegisterSet(set_index); - } - case llvm::Triple::mips: - case llvm::Triple::mipsel: { - const auto context = static_cast<const RegisterContextLinux_mips &> - (GetRegisterInfoInterface()); - return context.GetRegisterSet(set_index); - } - default: - llvm_unreachable("Unhandled target architecture."); - } -} - -lldb_private::Status -NativeRegisterContextLinux_mips64::ReadRegister(const RegisterInfo *reg_info, - RegisterValue ®_value) { - Status error; - - if (!reg_info) { - error.SetErrorString("reg_info NULL"); - return error; - } - - const uint32_t reg = reg_info->kinds[lldb::eRegisterKindLLDB]; - uint8_t byte_size = reg_info->byte_size; - if (reg == LLDB_INVALID_REGNUM) { - // This is likely an internal register for lldb use only and should not be - // directly queried. - error.SetErrorStringWithFormat("register \"%s\" is an internal-only lldb " - "register, cannot read directly", - reg_info->name); - return error; - } - - if (IsMSA(reg) && !IsMSAAvailable()) { - error.SetErrorString("MSA not available on this processor"); - return error; - } - - if (IsMSA(reg) || IsFPR(reg)) { - uint8_t *src = nullptr; - lldbassert(reg_info->byte_offset < sizeof(UserArea)); - - error = ReadCP1(); - - if (!error.Success()) { - error.SetErrorString("failed to read co-processor 1 register"); - return error; - } - - if (IsFPR(reg)) { - if (IsFR0() && (byte_size != 4)) { - byte_size = 4; - uint8_t ptrace_index; - ptrace_index = reg_info->kinds[lldb::eRegisterKindProcessPlugin]; - src = ReturnFPOffset(ptrace_index, reg_info->byte_offset); - } else - src = (uint8_t *)&m_fpr + reg_info->byte_offset - sizeof(m_gpr); - } else - src = (uint8_t *)&m_msa + reg_info->byte_offset - - (sizeof(m_gpr) + sizeof(m_fpr)); - switch (byte_size) { - case 4: - reg_value.SetUInt32(*(uint32_t *)src); - break; - case 8: - reg_value.SetUInt64(*(uint64_t *)src); - break; - case 16: - reg_value.SetBytes((const void *)src, 16, GetByteOrder()); - break; - default: - assert(false && "Unhandled data size."); - error.SetErrorStringWithFormat("unhandled byte size: %" PRIu32, - reg_info->byte_size); - break; - } - } else { - error = ReadRegisterRaw(reg, reg_value); - } - - return error; -} - -lldb_private::Status NativeRegisterContextLinux_mips64::WriteRegister( - const RegisterInfo *reg_info, const RegisterValue ®_value) { - Status error; - - assert(reg_info && "reg_info is null"); - - const uint32_t reg_index = reg_info->kinds[lldb::eRegisterKindLLDB]; - - if (reg_index == LLDB_INVALID_REGNUM) - return Status("no lldb regnum for %s", reg_info && reg_info->name - ? reg_info->name - : "<unknown register>"); - - if (IsMSA(reg_index) && !IsMSAAvailable()) { - error.SetErrorString("MSA not available on this processor"); - return error; - } - - if (IsFPR(reg_index) || IsMSA(reg_index)) { - uint8_t *dst = nullptr; - uint64_t *src = nullptr; - uint8_t byte_size = reg_info->byte_size; - lldbassert(reg_info->byte_offset < sizeof(UserArea)); - - // Initialise the FP and MSA buffers by reading all co-processor 1 - // registers - ReadCP1(); - - if (IsFPR(reg_index)) { - if (IsFR0() && (byte_size != 4)) { - byte_size = 4; - uint8_t ptrace_index; - ptrace_index = reg_info->kinds[lldb::eRegisterKindProcessPlugin]; - dst = ReturnFPOffset(ptrace_index, reg_info->byte_offset); - } else - dst = (uint8_t *)&m_fpr + reg_info->byte_offset - sizeof(m_gpr); - } else - dst = (uint8_t *)&m_msa + reg_info->byte_offset - - (sizeof(m_gpr) + sizeof(m_fpr)); - switch (byte_size) { - case 4: - *(uint32_t *)dst = reg_value.GetAsUInt32(); - break; - case 8: - *(uint64_t *)dst = reg_value.GetAsUInt64(); - break; - case 16: - src = (uint64_t *)reg_value.GetBytes(); - *(uint64_t *)dst = *src; - *(uint64_t *)(dst + 8) = *(src + 1); - break; - default: - assert(false && "Unhandled data size."); - error.SetErrorStringWithFormat("unhandled byte size: %" PRIu32, - reg_info->byte_size); - break; - } - error = WriteCP1(); - if (!error.Success()) { - error.SetErrorString("failed to write co-processor 1 register"); - return error; - } - } else { - error = WriteRegisterRaw(reg_index, reg_value); - } - - return error; -} - -Status NativeRegisterContextLinux_mips64::ReadAllRegisterValues( - lldb::DataBufferSP &data_sp) { - Status error; - - data_sp.reset(new DataBufferHeap(REG_CONTEXT_SIZE, 0)); - error = ReadGPR(); - if (!error.Success()) { - error.SetErrorString("ReadGPR() failed"); - return error; - } - - error = ReadCP1(); - if (!error.Success()) { - error.SetErrorString("ReadCP1() failed"); - return error; - } - - uint8_t *dst = data_sp->GetBytes(); - ::memcpy(dst, &m_gpr, GetRegisterInfoInterface().GetGPRSize()); - dst += GetRegisterInfoInterface().GetGPRSize(); - - ::memcpy(dst, &m_fpr, GetFPRSize()); - dst += GetFPRSize(); - - ::memcpy(dst, &m_msa, sizeof(MSA_linux_mips)); - - return error; -} - -Status NativeRegisterContextLinux_mips64::WriteAllRegisterValues( - const lldb::DataBufferSP &data_sp) { - Status error; - - if (!data_sp) { - error.SetErrorStringWithFormat( - "NativeRegisterContextLinux_mips64::%s invalid data_sp provided", - __FUNCTION__); - return error; - } - - if (data_sp->GetByteSize() != REG_CONTEXT_SIZE) { - error.SetErrorStringWithFormat( - "NativeRegisterContextLinux_mips64::%s data_sp contained mismatched " - "data size, expected %" PRIu64 ", actual %" PRIu64, - __FUNCTION__, REG_CONTEXT_SIZE, data_sp->GetByteSize()); - return error; - } - - uint8_t *src = data_sp->GetBytes(); - if (src == nullptr) { - error.SetErrorStringWithFormat("NativeRegisterContextLinux_mips64::%s " - "DataBuffer::GetBytes() returned a null " - "pointer", - __FUNCTION__); - return error; - } - - ::memcpy(&m_gpr, src, GetRegisterInfoInterface().GetGPRSize()); - src += GetRegisterInfoInterface().GetGPRSize(); - - ::memcpy(&m_fpr, src, GetFPRSize()); - src += GetFPRSize(); - - ::memcpy(&m_msa, src, sizeof(MSA_linux_mips)); - - error = WriteGPR(); - if (!error.Success()) { - error.SetErrorStringWithFormat( - "NativeRegisterContextLinux_mips64::%s WriteGPR() failed", - __FUNCTION__); - return error; - } - - error = WriteCP1(); - if (!error.Success()) { - error.SetErrorStringWithFormat( - "NativeRegisterContextLinux_mips64::%s WriteCP1() failed", - __FUNCTION__); - return error; - } - - return error; -} - -Status NativeRegisterContextLinux_mips64::ReadCP1() { - Status error; - - uint8_t *src = nullptr; - uint8_t *dst = nullptr; - - lldb::ByteOrder byte_order = GetByteOrder(); - - bool IsBigEndian = (byte_order == lldb::eByteOrderBig); - - if (IsMSAAvailable()) { - error = NativeRegisterContextLinux::ReadRegisterSet( - &m_iovec, sizeof(MSA_linux_mips), NT_MIPS_MSA); - src = (uint8_t *)&m_msa + (IsBigEndian * 8); - dst = (uint8_t *)&m_fpr; - for (int i = 0; i < NUM_REGISTERS; i++) { - // Copy fp values from msa buffer fetched via ptrace - *(uint64_t *)dst = *(uint64_t *)src; - src = src + 16; - dst = dst + 8; - } - m_fpr.fir = m_msa.fir; - m_fpr.fcsr = m_msa.fcsr; - m_fpr.config5 = m_msa.config5; - } else { - error = NativeRegisterContextLinux::ReadFPR(); - } - return error; -} - -uint8_t * -NativeRegisterContextLinux_mips64::ReturnFPOffset(uint8_t reg_index, - uint32_t byte_offset) { - - uint8_t *fp_buffer_ptr = nullptr; - lldb::ByteOrder byte_order = GetByteOrder(); - bool IsBigEndian = (byte_order == lldb::eByteOrderBig); - if (reg_index % 2) { - uint8_t offset_ diff = (IsBigEndian) ? 8 : 4; - fp_buffer_ptr = - (uint8_t *)&m_fpr + byte_offset - offset_ diff - sizeof(m_gpr); - } else { - fp_buffer_ptr = - (uint8_t *)&m_fpr + byte_offset + 4 * (IsBigEndian) - sizeof(m_gpr); - } - return fp_buffer_ptr; -} - -Status NativeRegisterContextLinux_mips64::WriteCP1() { - Status error; - - uint8_t *src = nullptr; - uint8_t *dst = nullptr; - - lldb::ByteOrder byte_order = GetByteOrder(); - - bool IsBigEndian = (byte_order == lldb::eByteOrderBig); - - if (IsMSAAvailable()) { - dst = (uint8_t *)&m_msa + (IsBigEndian * 8); - src = (uint8_t *)&m_fpr; - for (int i = 0; i < NUM_REGISTERS; i++) { - // Copy fp values to msa buffer for ptrace - *(uint64_t *)dst = *(uint64_t *)src; - dst = dst + 16; - src = src + 8; - } - m_msa.fir = m_fpr.fir; - m_msa.fcsr = m_fpr.fcsr; - m_msa.config5 = m_fpr.config5; - error = NativeRegisterContextLinux::WriteRegisterSet( - &m_iovec, sizeof(MSA_linux_mips), NT_MIPS_MSA); - } else { - error = NativeRegisterContextLinux::WriteFPR(); - } - - return error; -} - -bool NativeRegisterContextLinux_mips64::IsFR0() { - const RegisterInfo *const reg_info_p = GetRegisterInfoAtIndex(gpr_sr_mips64); - - RegisterValue reg_value; - ReadRegister(reg_info_p, reg_value); - - uint64_t value = reg_value.GetAsUInt64(); - - return (!(value & SR_FR)); -} - -bool NativeRegisterContextLinux_mips64::IsFRE() { - const RegisterInfo *const reg_info_p = - GetRegisterInfoAtIndex(gpr_config5_mips64); - - RegisterValue reg_value; - ReadRegister(reg_info_p, reg_value); - - uint64_t config5 = reg_value.GetAsUInt64(); - - return (config5 & CONFIG5_FRE); -} - -bool NativeRegisterContextLinux_mips64::IsFPR(uint32_t reg_index) const { - return (m_reg_info.first_fpr <= reg_index && - reg_index <= m_reg_info.last_fpr); -} - -static uint32_t GetWatchHi(struct pt_watch_regs *regs, uint32_t index) { - Log *log(ProcessPOSIXLog::GetLogIfAllCategoriesSet(POSIX_LOG_WATCHPOINTS)); - if (regs->style == pt_watch_style_mips32) - return regs->mips32.watchhi[index]; - else if (regs->style == pt_watch_style_mips64) - return regs->mips64.watchhi[index]; - LLDB_LOG(log, "Invalid watch register style"); - return 0; -} - -static void SetWatchHi(struct pt_watch_regs *regs, uint32_t index, - uint16_t value) { - Log *log(ProcessPOSIXLog::GetLogIfAllCategoriesSet(POSIX_LOG_WATCHPOINTS)); - if (regs->style == pt_watch_style_mips32) - regs->mips32.watchhi[index] = value; - else if (regs->style == pt_watch_style_mips64) - regs->mips64.watchhi[index] = value; - LLDB_LOG(log, "Invalid watch register style"); - return; -} - -static lldb::addr_t GetWatchLo(struct pt_watch_regs *regs, uint32_t index) { - Log *log(ProcessPOSIXLog::GetLogIfAllCategoriesSet(POSIX_LOG_WATCHPOINTS)); - if (regs->style == pt_watch_style_mips32) - return regs->mips32.watchlo[index]; - else if (regs->style == pt_watch_style_mips64) - return regs->mips64.watchlo[index]; - LLDB_LOG(log, "Invalid watch register style"); - return LLDB_INVALID_ADDRESS; -} - -static void SetWatchLo(struct pt_watch_regs *regs, uint32_t index, - uint64_t value) { - Log *log(ProcessPOSIXLog::GetLogIfAllCategoriesSet(POSIX_LOG_WATCHPOINTS)); - if (regs->style == pt_watch_style_mips32) - regs->mips32.watchlo[index] = (uint32_t)value; - else if (regs->style == pt_watch_style_mips64) - regs->mips64.watchlo[index] = value; - else - LLDB_LOG(log, "Invalid watch register style"); -} - -static uint32_t GetIRWMask(struct pt_watch_regs *regs, uint32_t index) { - Log *log(ProcessPOSIXLog::GetLogIfAllCategoriesSet(POSIX_LOG_WATCHPOINTS)); - if (regs->style == pt_watch_style_mips32) - return regs->mips32.watch_masks[index] & IRW; - else if (regs->style == pt_watch_style_mips64) - return regs->mips64.watch_masks[index] & IRW; - LLDB_LOG(log, "Invalid watch register style"); - return 0; -} - -static uint32_t GetRegMask(struct pt_watch_regs *regs, uint32_t index) { - Log *log(ProcessPOSIXLog::GetLogIfAllCategoriesSet(POSIX_LOG_WATCHPOINTS)); - if (regs->style == pt_watch_style_mips32) - return regs->mips32.watch_masks[index] & ~IRW; - else if (regs->style == pt_watch_style_mips64) - return regs->mips64.watch_masks[index] & ~IRW; - LLDB_LOG(log, "Invalid watch register style"); - return 0; -} - -static lldb::addr_t GetRangeMask(lldb::addr_t mask) { - lldb::addr_t mask_bit = 1; - while (mask_bit < mask) { - mask = mask | mask_bit; - mask_bit <<= 1; - } - return mask; -} - -static int GetVacantWatchIndex(struct pt_watch_regs *regs, lldb::addr_t addr, - uint32_t size, uint32_t irw, - uint32_t num_valid) { - lldb::addr_t last_byte = addr + size - 1; - lldb::addr_t mask = GetRangeMask(addr ^ last_byte) | IRW; - lldb::addr_t base_addr = addr & ~mask; - - // Check if this address is already watched by previous watch points. - lldb::addr_t lo; - uint16_t hi; - uint32_t vacant_watches = 0; - for (uint32_t index = 0; index < num_valid; index++) { - lo = GetWatchLo(regs, index); - if (lo != 0 && irw == ((uint32_t)lo & irw)) { - hi = GetWatchHi(regs, index) | IRW; - lo &= ~(lldb::addr_t)hi; - if (addr >= lo && last_byte <= (lo + hi)) - return index; - } else - vacant_watches++; - } - - // Now try to find a vacant index - if (vacant_watches > 0) { - vacant_watches = 0; - for (uint32_t index = 0; index < num_valid; index++) { - lo = GetWatchLo(regs, index); - if (lo == 0 && irw == (GetIRWMask(regs, index) & irw)) { - if (mask <= (GetRegMask(regs, index) | IRW)) { - // It fits, we can use it. - SetWatchLo(regs, index, base_addr | irw); - SetWatchHi(regs, index, mask & ~IRW); - return index; - } else { - // It doesn't fit, but has the proper IRW capabilities - vacant_watches++; - } - } - } - - if (vacant_watches > 1) { - // Split this watchpoint across several registers - struct pt_watch_regs regs_copy; - regs_copy = *regs; - lldb::addr_t break_addr; - uint32_t segment_size; - for (uint32_t index = 0; index < num_valid; index++) { - lo = GetWatchLo(®s_copy, index); - hi = GetRegMask(®s_copy, index) | IRW; - if (lo == 0 && irw == (hi & irw)) { - lo = addr & ~(lldb::addr_t)hi; - break_addr = lo + hi + 1; - if (break_addr >= addr + size) - segment_size = size; - else - segment_size = break_addr - addr; - mask = GetRangeMask(addr ^ (addr + segment_size - 1)); - SetWatchLo(®s_copy, index, (addr & ~mask) | irw); - SetWatchHi(®s_copy, index, mask & ~IRW); - if (break_addr >= addr + size) { - *regs = regs_copy; - return index; - } - size = addr + size - break_addr; - addr = break_addr; - } - } - } - } - return LLDB_INVALID_INDEX32; -} - -bool NativeRegisterContextLinux_mips64::IsMSA(uint32_t reg_index) const { - return (m_reg_info.first_msa <= reg_index && - reg_index <= m_reg_info.last_msa); -} - -bool NativeRegisterContextLinux_mips64::IsMSAAvailable() { - MSA_linux_mips msa_buf; - unsigned int regset = NT_MIPS_MSA; - - Status error = NativeProcessLinux::PtraceWrapper( - PTRACE_GETREGSET, Host::GetCurrentProcessID(), - static_cast<void *>(®set), &msa_buf, sizeof(MSA_linux_mips)); - - if (error.Success() && msa_buf.mir) { - return true; - } - - return false; -} - -Status NativeRegisterContextLinux_mips64::IsWatchpointHit(uint32_t wp_index, - bool &is_hit) { - if (wp_index >= NumSupportedHardwareWatchpoints()) - return Status("Watchpoint index out of range"); - - // reading the current state of watch regs - struct pt_watch_regs watch_readback; - Status error = DoReadWatchPointRegisterValue( - m_thread.GetID(), static_cast<void *>(&watch_readback)); - - if (GetWatchHi(&watch_readback, wp_index) & (IRW)) { - // clear hit flag in watchhi - SetWatchHi(&watch_readback, wp_index, - (GetWatchHi(&watch_readback, wp_index) & ~(IRW))); - DoWriteWatchPointRegisterValue(m_thread.GetID(), - static_cast<void *>(&watch_readback)); - - is_hit = true; - return error; - } - is_hit = false; - return error; -} - -Status NativeRegisterContextLinux_mips64::GetWatchpointHitIndex( - uint32_t &wp_index, lldb::addr_t trap_addr) { - uint32_t num_hw_wps = NumSupportedHardwareWatchpoints(); - for (wp_index = 0; wp_index < num_hw_wps; ++wp_index) { - bool is_hit; - Status error = IsWatchpointHit(wp_index, is_hit); - if (error.Fail()) { - wp_index = LLDB_INVALID_INDEX32; - } else if (is_hit) { - return error; - } - } - wp_index = LLDB_INVALID_INDEX32; - return Status(); -} - -Status NativeRegisterContextLinux_mips64::IsWatchpointVacant(uint32_t wp_index, - bool &is_vacant) { - is_vacant = false; - return Status("MIPS TODO: " - "NativeRegisterContextLinux_mips64::IsWatchpointVacant not " - "implemented"); -} - -bool NativeRegisterContextLinux_mips64::ClearHardwareWatchpoint( - uint32_t wp_index) { - if (wp_index >= NumSupportedHardwareWatchpoints()) - return false; - - struct pt_watch_regs regs; - // First reading the current state of watch regs - DoReadWatchPointRegisterValue(m_thread.GetID(), static_cast<void *>(®s)); - - if (regs.style == pt_watch_style_mips32) { - regs.mips32.watchlo[wp_index] = default_watch_regs.mips32.watchlo[wp_index]; - regs.mips32.watchhi[wp_index] = default_watch_regs.mips32.watchhi[wp_index]; - regs.mips32.watch_masks[wp_index] = - default_watch_regs.mips32.watch_masks[wp_index]; - } else // pt_watch_style_mips64 - { - regs.mips64.watchlo[wp_index] = default_watch_regs.mips64.watchlo[wp_index]; - regs.mips64.watchhi[wp_index] = default_watch_regs.mips64.watchhi[wp_index]; - regs.mips64.watch_masks[wp_index] = - default_watch_regs.mips64.watch_masks[wp_index]; - } - - Status error = DoWriteWatchPointRegisterValue(m_thread.GetID(), - static_cast<void *>(®s)); - if (!error.Fail()) { - hw_addr_map[wp_index] = LLDB_INVALID_ADDRESS; - return true; - } - return false; -} - -Status NativeRegisterContextLinux_mips64::ClearAllHardwareWatchpoints() { - return DoWriteWatchPointRegisterValue( - m_thread.GetID(), static_cast<void *>(&default_watch_regs)); -} - -Status NativeRegisterContextLinux_mips64::SetHardwareWatchpointWithIndex( - lldb::addr_t addr, size_t size, uint32_t watch_flags, uint32_t wp_index) { - Status error; - error.SetErrorString("MIPS TODO: " - "NativeRegisterContextLinux_mips64::" - "SetHardwareWatchpointWithIndex not implemented"); - return error; -} - -uint32_t NativeRegisterContextLinux_mips64::SetHardwareWatchpoint( - lldb::addr_t addr, size_t size, uint32_t watch_flags) { - struct pt_watch_regs regs; - - // First reading the current state of watch regs - DoReadWatchPointRegisterValue(m_thread.GetID(), static_cast<void *>(®s)); - - // Try if a new watch point fits in this state - int index = GetVacantWatchIndex(®s, addr, size, watch_flags, - NumSupportedHardwareWatchpoints()); - - // New watchpoint doesn't fit - if (index == LLDB_INVALID_INDEX32) - return LLDB_INVALID_INDEX32; - - // It fits, so we go ahead with updating the state of watch regs - DoWriteWatchPointRegisterValue(m_thread.GetID(), static_cast<void *>(®s)); - - // Storing exact address - hw_addr_map[index] = addr; - return index; -} - -lldb::addr_t -NativeRegisterContextLinux_mips64::GetWatchpointAddress(uint32_t wp_index) { - if (wp_index >= NumSupportedHardwareWatchpoints()) - return LLDB_INVALID_ADDRESS; - - return hw_addr_map[wp_index]; -} - -struct EmulatorBaton { - lldb::addr_t m_watch_hit_addr; - NativeProcessLinux *m_process; - NativeRegisterContext *m_reg_context; - - EmulatorBaton(NativeProcessLinux *process, NativeRegisterContext *reg_context) - : m_watch_hit_addr(LLDB_INVALID_ADDRESS), m_process(process), - m_reg_context(reg_context) {} -}; - -static size_t ReadMemoryCallback(EmulateInstruction *instruction, void *baton, - const EmulateInstruction::Context &context, - lldb::addr_t addr, void *dst, size_t length) { - size_t bytes_read; - EmulatorBaton *emulator_baton = static_cast<EmulatorBaton *>(baton); - emulator_baton->m_process->ReadMemory(addr, dst, length, bytes_read); - return bytes_read; -} - -static size_t WriteMemoryCallback(EmulateInstruction *instruction, void *baton, - const EmulateInstruction::Context &context, - lldb::addr_t addr, const void *dst, - size_t length) { - return length; -} - -static bool ReadRegisterCallback(EmulateInstruction *instruction, void *baton, - const RegisterInfo *reg_info, - RegisterValue ®_value) { - EmulatorBaton *emulator_baton = static_cast<EmulatorBaton *>(baton); - - const RegisterInfo *full_reg_info = - emulator_baton->m_reg_context->GetRegisterInfo( - lldb::eRegisterKindDWARF, reg_info->kinds[lldb::eRegisterKindDWARF]); - - Status error = - emulator_baton->m_reg_context->ReadRegister(full_reg_info, reg_value); - if (error.Success()) - return true; - - return false; -} - -static bool WriteRegisterCallback(EmulateInstruction *instruction, void *baton, - const EmulateInstruction::Context &context, - const RegisterInfo *reg_info, - const RegisterValue ®_value) { - if (reg_info->kinds[lldb::eRegisterKindDWARF] == dwarf_bad_mips64) { - EmulatorBaton *emulator_baton = static_cast<EmulatorBaton *>(baton); - emulator_baton->m_watch_hit_addr = reg_value.GetAsUInt64(); - } - - return true; -} - -/* - * MIPS Linux kernel returns a masked address (last 3bits are masked) - * when a HW watchpoint is hit. However user may not have set a watchpoint - * on this address. Emulate instruction at PC and find the base address of - * the load/store instruction. This will give the exact address used to - * read/write the variable. Send this exact address to client so that - * it can decide to stop or continue the thread. -*/ -lldb::addr_t -NativeRegisterContextLinux_mips64::GetWatchpointHitAddress(uint32_t wp_index) { - if (wp_index >= NumSupportedHardwareWatchpoints()) - return LLDB_INVALID_ADDRESS; - - lldb_private::ArchSpec arch; - arch = GetRegisterInfoInterface().GetTargetArchitecture(); - std::unique_ptr<EmulateInstruction> emulator_up( - EmulateInstruction::FindPlugin(arch, lldb_private::eInstructionTypeAny, - nullptr)); - - if (emulator_up == nullptr) - return LLDB_INVALID_ADDRESS; - - EmulatorBaton baton( - static_cast<NativeProcessLinux *>(&m_thread.GetProcess()), this); - emulator_up->SetBaton(&baton); - emulator_up->SetReadMemCallback(&ReadMemoryCallback); - emulator_up->SetReadRegCallback(&ReadRegisterCallback); - emulator_up->SetWriteMemCallback(&WriteMemoryCallback); - emulator_up->SetWriteRegCallback(&WriteRegisterCallback); - - if (!emulator_up->ReadInstruction()) - return LLDB_INVALID_ADDRESS; - - if (emulator_up->EvaluateInstruction(lldb::eEmulateInstructionOptionNone)) - return baton.m_watch_hit_addr; - - return LLDB_INVALID_ADDRESS; -} - -uint32_t NativeRegisterContextLinux_mips64::NumSupportedHardwareWatchpoints() { - Log *log(ProcessPOSIXLog::GetLogIfAllCategoriesSet(POSIX_LOG_WATCHPOINTS)); - struct pt_watch_regs regs; - static int num_valid = 0; - if (!num_valid) { - DoReadWatchPointRegisterValue(m_thread.GetID(), static_cast<void *>(®s)); - default_watch_regs = - regs; // Keeping default watch regs values for future use - switch (regs.style) { - case pt_watch_style_mips32: - num_valid = regs.mips32.num_valid; // Using num_valid as cache - return num_valid; - case pt_watch_style_mips64: - num_valid = regs.mips64.num_valid; - return num_valid; - } - LLDB_LOG(log, "Invalid watch register style"); - return 0; - } - return num_valid; -} - -Status -NativeRegisterContextLinux_mips64::ReadRegisterRaw(uint32_t reg_index, - RegisterValue &value) { - const RegisterInfo *const reg_info = GetRegisterInfoAtIndex(reg_index); - - if (!reg_info) - return Status("register %" PRIu32 " not found", reg_index); - - uint32_t offset = reg_info->kinds[lldb::eRegisterKindProcessPlugin]; - - if ((offset == ptrace_sr_mips) || (offset == ptrace_config5_mips)) - return Read_SR_Config(reg_info->byte_offset, reg_info->name, - reg_info->byte_size, value); - - return DoReadRegisterValue(offset, reg_info->name, reg_info->byte_size, - value); -} - -Status NativeRegisterContextLinux_mips64::WriteRegisterRaw( - uint32_t reg_index, const RegisterValue &value) { - const RegisterInfo *const reg_info = GetRegisterInfoAtIndex(reg_index); - - if (!reg_info) - return Status("register %" PRIu32 " not found", reg_index); - - if (reg_info->invalidate_regs) - lldbassert(false && "reg_info->invalidate_regs is unhandled"); - - uint32_t offset = reg_info->kinds[lldb::eRegisterKindProcessPlugin]; - return DoWriteRegisterValue(offset, reg_info->name, value); -} - -Status NativeRegisterContextLinux_mips64::Read_SR_Config(uint32_t offset, - const char *reg_name, - uint32_t size, - RegisterValue &value) { - GPR_linux_mips regs; - ::memset(®s, 0, sizeof(GPR_linux_mips)); - - Status error = NativeProcessLinux::PtraceWrapper( - PTRACE_GETREGS, m_thread.GetID(), NULL, ®s, sizeof regs); - if (error.Success()) { - const lldb_private::ArchSpec &arch = - m_thread.GetProcess().GetArchitecture(); - void *target_address = ((uint8_t *)®s) + offset + - 4 * (arch.GetMachine() == llvm::Triple::mips); - value.SetUInt(*(uint32_t *)target_address, size); - } - return error; -} - -Status NativeRegisterContextLinux_mips64::DoReadWatchPointRegisterValue( - lldb::tid_t tid, void *watch_readback) { - return NativeProcessLinux::PtraceWrapper(PTRACE_GET_WATCH_REGS, - m_thread.GetID(), watch_readback); -} - -Status NativeRegisterContextLinux_mips64::DoWriteWatchPointRegisterValue( - lldb::tid_t tid, void *watch_reg_value) { - return NativeProcessLinux::PtraceWrapper(PTRACE_SET_WATCH_REGS, - m_thread.GetID(), watch_reg_value); -} - -#endif // defined (__mips__) diff --git a/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_mips64.h b/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_mips64.h deleted file mode 100644 index 5465b84827f4..000000000000 --- a/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_mips64.h +++ /dev/null @@ -1,139 +0,0 @@ -//===-- NativeRegisterContextLinux_mips64.h ---------------------*- C++ -*-===// -// -// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. -// See https://llvm.org/LICENSE.txt for license information. -// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception -// -//===----------------------------------------------------------------------===// - -#if defined(__mips__) - -#ifndef lldb_NativeRegisterContextLinux_mips64_h -#define lldb_NativeRegisterContextLinux_mips64_h - -#include "Plugins/Process/Linux/NativeRegisterContextLinux.h" -#include "Plugins/Process/Utility/RegisterContext_mips.h" -#include "Plugins/Process/Utility/lldb-mips-linux-register-enums.h" -#include <sys/uio.h> - -#define MAX_NUM_WP 8 - -namespace lldb_private { -namespace process_linux { - -class NativeProcessLinux; - -class NativeRegisterContextLinux_mips64 : public NativeRegisterContextLinux { -public: - NativeRegisterContextLinux_mips64(const ArchSpec &target_arch, - NativeThreadProtocol &native_thread); - - uint32_t GetRegisterSetCount() const override; - - lldb::addr_t GetPCfromBreakpointLocation( - lldb::addr_t fail_value = LLDB_INVALID_ADDRESS) override; - - lldb::addr_t GetWatchpointHitAddress(uint32_t wp_index) override; - - const RegisterSet *GetRegisterSet(uint32_t set_index) const override; - - Status ReadRegister(const RegisterInfo *reg_info, - RegisterValue ®_value) override; - - Status WriteRegister(const RegisterInfo *reg_info, - const RegisterValue ®_value) override; - - Status ReadAllRegisterValues(lldb::DataBufferSP &data_sp) override; - - Status WriteAllRegisterValues(const lldb::DataBufferSP &data_sp) override; - - Status ReadCP1(); - - Status WriteCP1(); - - uint8_t *ReturnFPOffset(uint8_t reg_index, uint32_t byte_offset); - - Status IsWatchpointHit(uint32_t wp_index, bool &is_hit) override; - - Status GetWatchpointHitIndex(uint32_t &wp_index, - lldb::addr_t trap_addr) override; - - Status IsWatchpointVacant(uint32_t wp_index, bool &is_vacant) override; - - bool ClearHardwareWatchpoint(uint32_t wp_index) override; - - Status ClearAllHardwareWatchpoints() override; - - Status SetHardwareWatchpointWithIndex(lldb::addr_t addr, size_t size, - uint32_t watch_flags, - uint32_t wp_index); - - uint32_t SetHardwareWatchpoint(lldb::addr_t addr, size_t size, - uint32_t watch_flags) override; - - lldb::addr_t GetWatchpointAddress(uint32_t wp_index) override; - - uint32_t NumSupportedHardwareWatchpoints() override; - - static bool IsMSAAvailable(); - -protected: - Status Read_SR_Config(uint32_t offset, const char *reg_name, uint32_t size, - RegisterValue &value); - - Status ReadRegisterRaw(uint32_t reg_index, RegisterValue &value) override; - - Status WriteRegisterRaw(uint32_t reg_index, - const RegisterValue &value) override; - - Status DoReadWatchPointRegisterValue(lldb::tid_t tid, void *watch_readback); - - Status DoWriteWatchPointRegisterValue(lldb::tid_t tid, void *watch_readback); - - bool IsFR0(); - - bool IsFRE(); - - bool IsFPR(uint32_t reg_index) const; - - bool IsMSA(uint32_t reg_index) const; - - void *GetGPRBuffer() override { return &m_gpr; } - - void *GetFPRBuffer() override { return &m_fpr; } - - size_t GetFPRSize() override { return sizeof(FPR_linux_mips); } - -private: - // Info about register ranges. - struct RegInfo { - uint32_t num_registers; - uint32_t num_gpr_registers; - uint32_t num_fpr_registers; - - uint32_t last_gpr; - uint32_t first_fpr; - uint32_t last_fpr; - uint32_t first_msa; - uint32_t last_msa; - }; - - RegInfo m_reg_info; - - GPR_linux_mips m_gpr; - - FPR_linux_mips m_fpr; - - MSA_linux_mips m_msa; - - lldb::addr_t hw_addr_map[MAX_NUM_WP]; - - struct iovec m_iovec; -}; - -} // namespace process_linux -} // namespace lldb_private - -#endif // #ifndef lldb_NativeRegisterContextLinux_mips64_h - -#endif // defined (__mips__) diff --git a/lldb/source/Plugins/Process/Utility/CMakeLists.txt b/lldb/source/Plugins/Process/Utility/CMakeLists.txt index 31452da43bb9..c780b27149ef 100644 --- a/lldb/source/Plugins/Process/Utility/CMakeLists.txt +++ b/lldb/source/Plugins/Process/Utility/CMakeLists.txt @@ -27,8 +27,6 @@ add_lldb_library(lldbPluginProcessUtility RegisterContextHistory.cpp RegisterContextLinux_i386.cpp RegisterContextLinux_x86_64.cpp - RegisterContextLinux_mips64.cpp - RegisterContextLinux_mips.cpp RegisterContextLinux_s390x.cpp RegisterContextMach_arm.cpp RegisterContextMach_i386.cpp diff --git a/lldb/source/Plugins/Process/Utility/RegisterContextLinux_mips.cpp b/lldb/source/Plugins/Process/Utility/RegisterContextLinux_mips.cpp deleted file mode 100644 index 837549e2a495..000000000000 --- a/lldb/source/Plugins/Process/Utility/RegisterContextLinux_mips.cpp +++ /dev/null @@ -1,149 +0,0 @@ -//===-- RegisterContextLinux_mips.cpp -------------------------------------===// -// -// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. -// See https://llvm.org/LICENSE.txt for license information. -// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception -// -//===---------------------------------------------------------------------===// - -#include <stddef.h> -#include <vector> - -// For eh_frame and DWARF Register numbers -#include "RegisterContextLinux_mips.h" - -// Internal codes for mips registers -#include "lldb-mips-linux-register-enums.h" - -// For GP and FP buffers -#include "RegisterContext_mips.h" - -using namespace lldb_private; -using namespace lldb; - -// Include RegisterInfos_mips to declare our g_register_infos_mips structure. -#define DECLARE_REGISTER_INFOS_MIPS_STRUCT -#include "RegisterInfos_mips.h" -#undef DECLARE_REGISTER_INFOS_MIPS_STRUCT - -// mips general purpose registers. -const uint32_t g_gp_regnums_mips[] = { - gpr_zero_mips, gpr_r1_mips, gpr_r2_mips, gpr_r3_mips, - gpr_r4_mips, gpr_r5_mips, gpr_r6_mips, gpr_r7_mips, - gpr_r8_mips, gpr_r9_mips, gpr_r10_mips, gpr_r11_mips, - gpr_r12_mips, gpr_r13_mips, gpr_r14_mips, gpr_r15_mips, - gpr_r16_mips, gpr_r17_mips, gpr_r18_mips, gpr_r19_mips, - gpr_r20_mips, gpr_r21_mips, gpr_r22_mips, gpr_r23_mips, - gpr_r24_mips, gpr_r25_mips, gpr_r26_mips, gpr_r27_mips, - gpr_gp_mips, gpr_sp_mips, gpr_r30_mips, gpr_ra_mips, - gpr_sr_mips, gpr_mullo_mips, gpr_mulhi_mips, gpr_badvaddr_mips, - gpr_cause_mips, gpr_pc_mips, gpr_config5_mips, - LLDB_INVALID_REGNUM // register sets need to end with this flag -}; - -static_assert((sizeof(g_gp_regnums_mips) / sizeof(g_gp_regnums_mips[0])) - 1 == - k_num_gpr_registers_mips, - "g_gp_regnums_mips has wrong number of register infos"); -// mips floating point registers. -const uint32_t g_fp_regnums_mips[] = { - fpr_f0_mips, fpr_f1_mips, fpr_f2_mips, fpr_f3_mips, - fpr_f4_mips, fpr_f5_mips, fpr_f6_mips, fpr_f7_mips, - fpr_f8_mips, fpr_f9_mips, fpr_f10_mips, fpr_f11_mips, - fpr_f12_mips, fpr_f13_mips, fpr_f14_mips, fpr_f15_mips, - fpr_f16_mips, fpr_f17_mips, fpr_f18_mips, fpr_f19_mips, - fpr_f20_mips, fpr_f21_mips, fpr_f22_mips, fpr_f23_mips, - fpr_f24_mips, fpr_f25_mips, fpr_f26_mips, fpr_f27_mips, - fpr_f28_mips, fpr_f29_mips, fpr_f30_mips, fpr_f31_mips, - fpr_fcsr_mips, fpr_fir_mips, fpr_config5_mips, - LLDB_INVALID_REGNUM // register sets need to end with this flag -}; - -static_assert((sizeof(g_fp_regnums_mips) / sizeof(g_fp_regnums_mips[0])) - 1 == - k_num_fpr_registers_mips, - "g_fp_regnums_mips has wrong number of register infos"); - -// mips MSA registers. -const uint32_t g_msa_regnums_mips[] = { - msa_w0_mips, msa_w1_mips, msa_w2_mips, msa_w3_mips, - msa_w4_mips, msa_w5_mips, msa_w6_mips, msa_w7_mips, - msa_w8_mips, msa_w9_mips, msa_w10_mips, msa_w11_mips, - msa_w12_mips, msa_w13_mips, msa_w14_mips, msa_w15_mips, - msa_w16_mips, msa_w17_mips, msa_w18_mips, msa_w19_mips, - msa_w20_mips, msa_w21_mips, msa_w22_mips, msa_w23_mips, - msa_w24_mips, msa_w25_mips, msa_w26_mips, msa_w27_mips, - msa_w28_mips, msa_w29_mips, msa_w30_mips, msa_w31_mips, - msa_fcsr_mips, msa_fir_mips, msa_mcsr_mips, msa_mir_mips, - msa_config5_mips, - LLDB_INVALID_REGNUM // register sets need to end with this flag -}; - -static_assert((sizeof(g_msa_regnums_mips) / sizeof(g_msa_regnums_mips[0])) - - 1 == - k_num_msa_registers_mips, - "g_msa_regnums_mips has wrong number of register infos"); - -// Number of register sets provided by this context. -constexpr size_t k_num_register_sets = 3; - -// Register sets for mips. -static const RegisterSet g_reg_sets_mips[k_num_register_sets] = { - {"General Purpose Registers", "gpr", k_num_gpr_registers_mips, - g_gp_regnums_mips}, - {"Floating Point Registers", "fpu", k_num_fpr_registers_mips, - g_fp_regnums_mips}, - {"MSA Registers", "msa", k_num_msa_registers_mips, g_msa_regnums_mips}}; - -uint32_t GetUserRegisterInfoCount(bool msa_present) { - if (msa_present) - return static_cast<uint32_t>(k_num_user_registers_mips); - return static_cast<uint32_t>(k_num_user_registers_mips - - k_num_msa_registers_mips); -} - -RegisterContextLinux_mips::RegisterContextLinux_mips( - const ArchSpec &target_arch, bool msa_present) - : RegisterInfoInterface(target_arch), - m_user_register_count(GetUserRegisterInfoCount(msa_present)) {} - -size_t RegisterContextLinux_mips::GetGPRSize() const { - return sizeof(GPR_linux_mips); -} - -const RegisterInfo *RegisterContextLinux_mips::GetRegisterInfo() const { - switch (m_target_arch.GetMachine()) { - case llvm::Triple::mips: - case llvm::Triple::mipsel: - return g_register_infos_mips; - default: - assert(false && "Unhandled target architecture."); - return nullptr; - } -} - -const RegisterSet * -RegisterContextLinux_mips::GetRegisterSet(size_t set) const { - if (set >= k_num_register_sets) - return nullptr; - switch (m_target_arch.GetMachine()) { - case llvm::Triple::mips: - case llvm::Triple::mipsel: - return &g_reg_sets_mips[set]; - default: - assert(false && "Unhandled target architecture."); - return nullptr; - } -} - -size_t -RegisterContextLinux_mips::GetRegisterSetCount() const { - return k_num_register_sets; -} - -uint32_t RegisterContextLinux_mips::GetRegisterCount() const { - return static_cast<uint32_t>(sizeof(g_register_infos_mips) / - sizeof(g_register_infos_mips[0])); -} - -uint32_t RegisterContextLinux_mips::GetUserRegisterCount() const { - return static_cast<uint32_t>(m_user_register_count); -} diff --git a/lldb/source/Plugins/Process/Utility/RegisterContextLinux_mips.h b/lldb/source/Plugins/Process/Utility/RegisterContextLinux_mips.h deleted file mode 100644 index 9b59ab421ff4..000000000000 --- a/lldb/source/Plugins/Process/Utility/RegisterContextLinux_mips.h +++ /dev/null @@ -1,36 +0,0 @@ -//===-- RegisterContextLinux_mips.h ---------------------------*- C++ -*-===// -// -// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. -// See https://llvm.org/LICENSE.txt for license information. -// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception -// -//===----------------------------------------------------------------------===// - -#ifndef LLDB_SOURCE_PLUGINS_PROCESS_UTILITY_REGISTERCONTEXTLINUX_MIPS_H -#define LLDB_SOURCE_PLUGINS_PROCESS_UTILITY_REGISTERCONTEXTLINUX_MIPS_H - -#include "RegisterInfoInterface.h" -#include "lldb/lldb-private.h" - -class RegisterContextLinux_mips : public lldb_private::RegisterInfoInterface { -public: - RegisterContextLinux_mips(const lldb_private::ArchSpec &target_arch, - bool msa_present = true); - - size_t GetGPRSize() const override; - - const lldb_private::RegisterInfo *GetRegisterInfo() const override; - - const lldb_private::RegisterSet *GetRegisterSet(size_t set) const; - - size_t GetRegisterSetCount() const; - - uint32_t GetRegisterCount() const override; - - uint32_t GetUserRegisterCount() const override; - -private: - uint32_t m_user_register_count; -}; - -#endif diff --git a/lldb/source/Plugins/Process/Utility/RegisterContextLinux_mips64.cpp b/lldb/source/Plugins/Process/Utility/RegisterContextLinux_mips64.cpp deleted file mode 100644 index 432a78129fde..000000000000 --- a/lldb/source/Plugins/Process/Utility/RegisterContextLinux_mips64.cpp +++ /dev/null @@ -1,207 +0,0 @@ -//===-- RegisterContextLinux_mips64.cpp -----------------------------------===// -// -// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. -// See https://llvm.org/LICENSE.txt for license information. -// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception -// -//===---------------------------------------------------------------------===// - - -#include <stddef.h> -#include <vector> - -// For eh_frame and DWARF Register numbers -#include "RegisterContextLinux_mips64.h" - -// For GP and FP buffers -#include "RegisterContext_mips.h" - -// Internal codes for all mips32 and mips64 registers -#include "lldb-mips-linux-register-enums.h" - -using namespace lldb; -using namespace lldb_private; - -// Include RegisterInfos_mips64 to declare our g_register_infos_mips64 -// structure. -#define DECLARE_REGISTER_INFOS_MIPS64_STRUCT -#define LINUX_MIPS64 -#include "RegisterInfos_mips64.h" -#undef LINUX_MIPS64 -#undef DECLARE_REGISTER_INFOS_MIPS64_STRUCT - -// Include RegisterInfos_mips to declare our g_register_infos_mips structure. -#define DECLARE_REGISTER_INFOS_MIPS_STRUCT -#include "RegisterInfos_mips.h" -#undef DECLARE_REGISTER_INFOS_MIPS_STRUCT - -// mips64 general purpose registers. -const uint32_t g_gp_regnums_mips64[] = { - gpr_zero_mips64, gpr_r1_mips64, gpr_r2_mips64, - gpr_r3_mips64, gpr_r4_mips64, gpr_r5_mips64, - gpr_r6_mips64, gpr_r7_mips64, gpr_r8_mips64, - gpr_r9_mips64, gpr_r10_mips64, gpr_r11_mips64, - gpr_r12_mips64, gpr_r13_mips64, gpr_r14_mips64, - gpr_r15_mips64, gpr_r16_mips64, gpr_r17_mips64, - gpr_r18_mips64, gpr_r19_mips64, gpr_r20_mips64, - gpr_r21_mips64, gpr_r22_mips64, gpr_r23_mips64, - gpr_r24_mips64, gpr_r25_mips64, gpr_r26_mips64, - gpr_r27_mips64, gpr_gp_mips64, gpr_sp_mips64, - gpr_r30_mips64, gpr_ra_mips64, gpr_sr_mips64, - gpr_mullo_mips64, gpr_mulhi_mips64, gpr_badvaddr_mips64, - gpr_cause_mips64, gpr_pc_mips64, gpr_config5_mips64, - LLDB_INVALID_REGNUM // register sets need to end with this flag -}; - -static_assert((sizeof(g_gp_regnums_mips64) / sizeof(g_gp_regnums_mips64[0])) - - 1 == - k_num_gpr_registers_mips64, - "g_gp_regnums_mips64 has wrong number of register infos"); - -// mips64 floating point registers. -const uint32_t g_fp_regnums_mips64[] = { - fpr_f0_mips64, fpr_f1_mips64, fpr_f2_mips64, fpr_f3_mips64, - fpr_f4_mips64, fpr_f5_mips64, fpr_f6_mips64, fpr_f7_mips64, - fpr_f8_mips64, fpr_f9_mips64, fpr_f10_mips64, fpr_f11_mips64, - fpr_f12_mips64, fpr_f13_mips64, fpr_f14_mips64, fpr_f15_mips64, - fpr_f16_mips64, fpr_f17_mips64, fpr_f18_mips64, fpr_f19_mips64, - fpr_f20_mips64, fpr_f21_mips64, fpr_f22_mips64, fpr_f23_mips64, - fpr_f24_mips64, fpr_f25_mips64, fpr_f26_mips64, fpr_f27_mips64, - fpr_f28_mips64, fpr_f29_mips64, fpr_f30_mips64, fpr_f31_mips64, - fpr_fcsr_mips64, fpr_fir_mips64, fpr_config5_mips64, - LLDB_INVALID_REGNUM // register sets need to end with this flag -}; - -static_assert((sizeof(g_fp_regnums_mips64) / sizeof(g_fp_regnums_mips64[0])) - - 1 == - k_num_fpr_registers_mips64, - "g_fp_regnums_mips64 has wrong number of register infos"); - -// mips64 MSA registers. -const uint32_t g_msa_regnums_mips64[] = { - msa_w0_mips64, msa_w1_mips64, msa_w2_mips64, msa_w3_mips64, - msa_w4_mips64, msa_w5_mips64, msa_w6_mips64, msa_w7_mips64, - msa_w8_mips64, msa_w9_mips64, msa_w10_mips64, msa_w11_mips64, - msa_w12_mips64, msa_w13_mips64, msa_w14_mips64, msa_w15_mips64, - msa_w16_mips64, msa_w17_mips64, msa_w18_mips64, msa_w19_mips64, - msa_w20_mips64, msa_w21_mips64, msa_w22_mips64, msa_w23_mips64, - msa_w24_mips64, msa_w25_mips64, msa_w26_mips64, msa_w27_mips64, - msa_w28_mips64, msa_w29_mips64, msa_w30_mips64, msa_w31_mips64, - msa_fcsr_mips64, msa_fir_mips64, msa_mcsr_mips64, msa_mir_mips64, - msa_config5_mips64, - LLDB_INVALID_REGNUM // register sets need to end with this flag -}; - -static_assert((sizeof(g_msa_regnums_mips64) / sizeof(g_msa_regnums_mips64[0])) - - 1 == - k_num_msa_registers_mips64, - "g_msa_regnums_mips64 has wrong number of register infos"); - -// Number of register sets provided by this context. -constexpr size_t k_num_register_sets = 3; - -// Register sets for mips64. -static const RegisterSet g_reg_sets_mips64[k_num_register_sets] = { - {"General Purpose Registers", "gpr", k_num_gpr_registers_mips64, - g_gp_regnums_mips64}, - {"Floating Point Registers", "fpu", k_num_fpr_registers_mips64, - g_fp_regnums_mips64}, - {"MSA Registers", "msa", k_num_msa_registers_mips64, g_msa_regnums_mips64}, -}; - -const RegisterSet * -RegisterContextLinux_mips64::GetRegisterSet(size_t set) const { - if (set >= k_num_register_sets) - return nullptr; - - switch (m_target_arch.GetMachine()) { - case llvm::Triple::mips64: - case llvm::Triple::mips64el: - return &g_reg_sets_mips64[set]; - default: - assert(false && "Unhandled target architecture."); - return nullptr; - } - return nullptr; -} - -size_t -RegisterContextLinux_mips64::GetRegisterSetCount() const { - return k_num_register_sets; -} - -static const RegisterInfo *GetRegisterInfoPtr(const ArchSpec &target_arch) { - switch (target_arch.GetMachine()) { - case llvm::Triple::mips64: - case llvm::Triple::mips64el: - return g_register_infos_mips64; - case llvm::Triple::mips: - case llvm::Triple::mipsel: - return g_register_infos_mips; - default: - assert(false && "Unhandled target architecture."); - return nullptr; - } -} - -static uint32_t GetRegisterInfoCount(const ArchSpec &target_arch) { - switch (target_arch.GetMachine()) { - case llvm::Triple::mips64: - case llvm::Triple::mips64el: - return static_cast<uint32_t>(sizeof(g_register_infos_mips64) / - sizeof(g_register_infos_mips64[0])); - case llvm::Triple::mips: - case llvm::Triple::mipsel: - return static_cast<uint32_t>(sizeof(g_register_infos_mips) / - sizeof(g_register_infos_mips[0])); - default: - assert(false && "Unhandled target architecture."); - return 0; - } -} - -uint32_t GetUserRegisterInfoCount(const ArchSpec &target_arch, - bool msa_present) { - switch (target_arch.GetMachine()) { - case llvm::Triple::mips: - case llvm::Triple::mipsel: - if (msa_present) - return static_cast<uint32_t>(k_num_user_registers_mips); - return static_cast<uint32_t>(k_num_user_registers_mips - - k_num_msa_registers_mips); - case llvm::Triple::mips64el: - case llvm::Triple::mips64: - if (msa_present) - return static_cast<uint32_t>(k_num_user_registers_mips64); - return static_cast<uint32_t>(k_num_user_registers_mips64 - - k_num_msa_registers_mips64); - default: - assert(false && "Unhandled target architecture."); - return 0; - } -} - -RegisterContextLinux_mips64::RegisterContextLinux_mips64( - const ArchSpec &target_arch, bool msa_present) - : lldb_private::RegisterInfoInterface(target_arch), - m_register_info_p(GetRegisterInfoPtr(target_arch)), - m_register_info_count(GetRegisterInfoCount(target_arch)), - m_user_register_count( - GetUserRegisterInfoCount(target_arch, msa_present)) {} - -size_t RegisterContextLinux_mips64::GetGPRSize() const { - return sizeof(GPR_linux_mips); -} - -const RegisterInfo *RegisterContextLinux_mips64::GetRegisterInfo() const { - return m_register_info_p; -} - -uint32_t RegisterContextLinux_mips64::GetRegisterCount() const { - return m_register_info_count; -} - -uint32_t RegisterContextLinux_mips64::GetUserRegisterCount() const { - return m_user_register_count; -} - diff --git a/lldb/source/Plugins/Process/Utility/RegisterContextLinux_mips64.h b/lldb/source/Plugins/Process/Utility/RegisterContextLinux_mips64.h deleted file mode 100644 index 899f0a40e4ae..000000000000 --- a/lldb/source/Plugins/Process/Utility/RegisterContextLinux_mips64.h +++ /dev/null @@ -1,39 +0,0 @@ -//===-- RegisterContextLinux_mips64.h ---------------------------*- C++ -*-===// -// -// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. -// See https://llvm.org/LICENSE.txt for license information. -// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception -// -//===----------------------------------------------------------------------===// - -#ifndef LLDB_SOURCE_PLUGINS_PROCESS_UTILITY_REGISTERCONTEXTLINUX_MIPS64_H -#define LLDB_SOURCE_PLUGINS_PROCESS_UTILITY_REGISTERCONTEXTLINUX_MIPS64_H - -#include "RegisterInfoInterface.h" -#include "lldb/lldb-private.h" - -class RegisterContextLinux_mips64 : public lldb_private::RegisterInfoInterface { -public: - RegisterContextLinux_mips64(const lldb_private::ArchSpec &target_arch, - bool msa_present = true); - - size_t GetGPRSize() const override; - - const lldb_private::RegisterInfo *GetRegisterInfo() const override; - - const lldb_private::RegisterSet *GetRegisterSet(size_t set) const; - - size_t GetRegisterSetCount() const; - - uint32_t GetRegisterCount() const override; - - uint32_t GetUserRegisterCount() const override; - -private: - const lldb_private::RegisterInfo *m_register_info_p; - uint32_t m_register_info_count; - uint32_t m_user_register_count; -}; - -#endif - diff --git a/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_mips64.cpp b/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_mips64.cpp index c41c4bd7a7ea..261310cd5342 100644 --- a/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_mips64.cpp +++ b/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_mips64.cpp @@ -22,8 +22,6 @@ #include "RegisterContextPOSIX_mips64.h" #include "RegisterContextFreeBSD_mips64.h" -#include "RegisterContextLinux_mips64.h" -#include "RegisterContextLinux_mips.h" using namespace lldb_private; using namespace lldb; @@ -102,17 +100,6 @@ RegisterContextPOSIX_mips64::GetRegisterInfoAtIndex(size_t reg) { size_t RegisterContextPOSIX_mips64::GetRegisterSetCount() { ArchSpec target_arch = m_register_info_up->GetTargetArchitecture(); switch (target_arch.GetTriple().getOS()) { - case llvm::Triple::Linux: { - if ((target_arch.GetMachine() == llvm::Triple::mipsel) || - (target_arch.GetMachine() == llvm::Triple::mips)) { - const auto *context = static_cast<const RegisterContextLinux_mips *>( - m_register_info_up.get()); - return context->GetRegisterSetCount(); - } - const auto *context = static_cast<const RegisterContextLinux_mips64 *>( - m_register_info_up.get()); - return context->GetRegisterSetCount(); - } default: { const auto *context = static_cast<const RegisterContextFreeBSD_mips64 *>( m_register_info_up.get()); @@ -125,17 +112,6 @@ size_t RegisterContextPOSIX_mips64::GetRegisterSetCount() { const RegisterSet *RegisterContextPOSIX_mips64::GetRegisterSet(size_t set) { ArchSpec target_arch = m_register_info_up->GetTargetArchitecture(); switch (target_arch.GetTriple().getOS()) { - case llvm::Triple::Linux: { - if ((target_arch.GetMachine() == llvm::Triple::mipsel) || - (target_arch.GetMachine() == llvm::Triple::mips)) { - const auto *context = static_cast<const RegisterContextLinux_mips *>( - m_register_info_up.get()); - return context->GetRegisterSet(set); - } - const auto *context = static_cast<const RegisterContextLinux_mips64 *>( - m_register_info_up.get()); - return context->GetRegisterSet(set); - } default: { const auto *context = static_cast<const RegisterContextFreeBSD_mips64 *>( m_register_info_up.get()); diff --git a/lldb/source/Plugins/Process/Utility/RegisterInfos_mips64.h b/lldb/source/Plugins/Process/Utility/RegisterInfos_mips64.h index b6e218ea4414..dc4da068dfa9 100644 --- a/lldb/source/Plugins/Process/Utility/RegisterInfos_mips64.h +++ b/lldb/source/Plugins/Process/Utility/RegisterInfos_mips64.h @@ -15,37 +15,11 @@ #ifdef DECLARE_REGISTER_INFOS_MIPS64_STRUCT // Computes the offset of the given GPR in the user data area. -#ifdef LINUX_MIPS64 -#define GPR_OFFSET(regname) \ - (LLVM_EXTENSION offsetof(UserArea, gpr) + \ - LLVM_EXTENSION offsetof(GPR_linux_mips, regname)) -#else #define GPR_OFFSET(regname) (LLVM_EXTENSION offsetof(GPR_freebsd_mips, regname)) -#endif - -// Computes the offset of the given FPR in the extended data area. -#define FPR_OFFSET(regname) \ - (LLVM_EXTENSION offsetof(UserArea, fpr) + \ - LLVM_EXTENSION offsetof(FPR_linux_mips, regname)) - -// Computes the offset of the given MSA in the extended data area. -#define MSA_OFFSET(regname) \ - (LLVM_EXTENSION offsetof(UserArea, msa) + \ - LLVM_EXTENSION offsetof(MSA_linux_mips, regname)) // RegisterKind: EHFrame, DWARF, Generic, Process Plugin, LLDB // Note that the size and offset will be updated by platform-specific classes. -#ifdef LINUX_MIPS64 -#define DEFINE_GPR(reg, alt, kind1, kind2, kind3) \ - { \ - #reg, alt, sizeof(((GPR_linux_mips *) 0)->reg), \ - GPR_OFFSET(reg), eEncodingUint, eFormatHex, \ - {kind1, kind2, kind3, ptrace_##reg##_mips, \ - gpr_##reg##_mips64 }, \ - NULL, NULL, NULL, 0 \ - } -#else #define DEFINE_GPR(reg, alt, kind1, kind2, kind3, kind4) \ { \ #reg, alt, sizeof(((GPR_freebsd_mips *) 0)->reg), \ @@ -54,63 +28,10 @@ gpr_##reg##_mips64 }, \ NULL, NULL, NULL, 0 \ } -#endif - -#define DEFINE_GPR_INFO(reg, alt, kind1, kind2, kind3) \ - { \ - #reg, alt, sizeof(((GPR_linux_mips *) 0)->reg) / 2, \ - GPR_OFFSET(reg), eEncodingUint, eFormatHex, \ - {kind1, kind2, kind3, ptrace_##reg##_mips, \ - gpr_##reg##_mips64 }, \ - NULL, NULL, NULL, 0 \ - } - -const uint8_t dwarf_opcode_mips64[] = { - llvm::dwarf::DW_OP_regx, dwarf_sr_mips64, llvm::dwarf::DW_OP_lit1, - llvm::dwarf::DW_OP_lit26, llvm::dwarf::DW_OP_shl, llvm::dwarf::DW_OP_and, - llvm::dwarf::DW_OP_lit26, llvm::dwarf::DW_OP_shr}; - -#define DEFINE_FPR(reg, alt, kind1, kind2, kind3) \ - { \ - #reg, alt, sizeof(((FPR_linux_mips *) 0)->reg), \ - FPR_OFFSET(reg), eEncodingIEEE754, eFormatFloat, \ - {kind1, kind2, kind3, ptrace_##reg##_mips, \ - fpr_##reg##_mips64 }, \ - NULL, NULL, dwarf_opcode_mips64, \ - sizeof(dwarf_opcode_mips64) \ - } - -#define DEFINE_FPR_INFO(reg, alt, kind1, kind2, kind3) \ - { \ - #reg, alt, sizeof(((FPR_linux_mips *) 0)->reg), \ - FPR_OFFSET(reg), eEncodingUint, eFormatHex, \ - {kind1, kind2, kind3, ptrace_##reg##_mips, \ - fpr_##reg##_mips64 }, \ - NULL, NULL, NULL, 0 \ - } - -#define DEFINE_MSA(reg, alt, kind1, kind2, kind3, kind4) \ - { \ - #reg, alt, sizeof(((MSA_linux_mips *) 0)->reg), \ - MSA_OFFSET(reg), eEncodingVector, eFormatVectorOfUInt8, \ - {kind1, kind2, kind3, kind4, \ - msa_##reg##_mips64 }, \ - NULL, NULL, NULL, 0 \ - } - -#define DEFINE_MSA_INFO(reg, alt, kind1, kind2, kind3, kind4) \ - { \ - #reg, alt, sizeof(((MSA_linux_mips *) 0)->reg), \ - MSA_OFFSET(reg), eEncodingUint, eFormatHex, \ - {kind1, kind2, kind3, kind4, \ - msa_##reg##_mips64 }, \ - NULL, NULL, NULL, 0 \ - } static RegisterInfo g_register_infos_mips64[] = { // General purpose registers. EH_Frame, DWARF, // Generic, Process Plugin -#ifndef LINUX_MIPS64 DEFINE_GPR(zero, "r0", dwarf_zero_mips64, dwarf_zero_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), DEFINE_GPR(r1, nullptr, dwarf_r1_mips64, dwarf_r1_mips64, @@ -191,231 +112,6 @@ static RegisterInfo g_register_infos_mips64[] = { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), DEFINE_GPR(dummy, nullptr, dwarf_dummy_mips64, dwarf_dummy_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), -#else - DEFINE_GPR(zero, "r0", dwarf_zero_mips64, dwarf_zero_mips64, - LLDB_INVALID_REGNUM), - DEFINE_GPR(r1, nullptr, dwarf_r1_mips64, dwarf_r1_mips64, - LLDB_INVALID_REGNUM), - DEFINE_GPR(r2, nullptr, dwarf_r2_mips64, dwarf_r2_mips64, - LLDB_INVALID_REGNUM), - DEFINE_GPR(r3, nullptr, dwarf_r3_mips64, dwarf_r3_mips64, - LLDB_INVALID_REGNUM), - DEFINE_GPR(r4, nullptr, dwarf_r4_mips64, dwarf_r4_mips64, - LLDB_REGNUM_GENERIC_ARG1), - DEFINE_GPR(r5, nullptr, dwarf_r5_mips64, dwarf_r5_mips64, - LLDB_REGNUM_GENERIC_ARG2), - DEFINE_GPR(r6, nullptr, dwarf_r6_mips64, dwarf_r6_mips64, - LLDB_REGNUM_GENERIC_ARG3), - DEFINE_GPR(r7, nullptr, dwarf_r7_mips64, dwarf_r7_mips64, - LLDB_REGNUM_GENERIC_ARG4), - DEFINE_GPR(r8, nullptr, dwarf_r8_mips64, dwarf_r8_mips64, - LLDB_REGNUM_GENERIC_ARG5), - DEFINE_GPR(r9, nullptr, dwarf_r9_mips64, dwarf_r9_mips64, - LLDB_REGNUM_GENERIC_ARG6), - DEFINE_GPR(r10, nullptr, dwarf_r10_mips64, dwarf_r10_mips64, - LLDB_REGNUM_GENERIC_ARG7), - DEFINE_GPR(r11, nullptr, dwarf_r11_mips64, dwarf_r11_mips64, - LLDB_REGNUM_GENERIC_ARG8), - DEFINE_GPR(r12, nullptr, dwarf_r12_mips64, dwarf_r12_mips64, - LLDB_INVALID_REGNUM), - DEFINE_GPR(r13, nullptr, dwarf_r13_mips64, dwarf_r13_mips64, - LLDB_INVALID_REGNUM), - DEFINE_GPR(r14, nullptr, dwarf_r14_mips64, dwarf_r14_mips64, - LLDB_INVALID_REGNUM), - DEFINE_GPR(r15, nullptr, dwarf_r15_mips64, dwarf_r15_mips64, - LLDB_INVALID_REGNUM), - DEFINE_GPR(r16, nullptr, dwarf_r16_mips64, dwarf_r16_mips64, - LLDB_INVALID_REGNUM), - DEFINE_GPR(r17, nullptr, dwarf_r17_mips64, dwarf_r17_mips64, - LLDB_INVALID_REGNUM), - DEFINE_GPR(r18, nullptr, dwarf_r18_mips64, dwarf_r18_mips64, - LLDB_INVALID_REGNUM), - DEFINE_GPR(r19, nullptr, dwarf_r19_mips64, dwarf_r19_mips64, - LLDB_INVALID_REGNUM), - DEFINE_GPR(r20, nullptr, dwarf_r20_mips64, dwarf_r20_mips64, - LLDB_INVALID_REGNUM), - DEFINE_GPR(r21, nullptr, dwarf_r21_mips64, dwarf_r21_mips64, - LLDB_INVALID_REGNUM), - DEFINE_GPR(r22, nullptr, dwarf_r22_mips64, dwarf_r22_mips64, - LLDB_INVALID_REGNUM), - DEFINE_GPR(r23, nullptr, dwarf_r23_mips64, dwarf_r23_mips64, - LLDB_INVALID_REGNUM), - DEFINE_GPR(r24, nullptr, dwarf_r24_mips64, dwarf_r24_mips64, - LLDB_INVALID_REGNUM), - DEFINE_GPR(r25, nullptr, dwarf_r25_mips64, dwarf_r25_mips64, - LLDB_INVALID_REGNUM), - DEFINE_GPR(r26, nullptr, dwarf_r26_mips64, dwarf_r26_mips64, - LLDB_INVALID_REGNUM), - DEFINE_GPR(r27, nullptr, dwarf_r27_mips64, dwarf_r27_mips64, - LLDB_INVALID_REGNUM), - DEFINE_GPR(gp, "r28", dwarf_gp_mips64, dwarf_gp_mips64, - LLDB_INVALID_REGNUM), - DEFINE_GPR(sp, "r29", dwarf_sp_mips64, dwarf_sp_mips64, - LLDB_REGNUM_GENERIC_SP), - DEFINE_GPR(r30, nullptr, dwarf_r30_mips64, dwarf_r30_mips64, - LLDB_REGNUM_GENERIC_FP), - DEFINE_GPR(ra, "r31", dwarf_ra_mips64, dwarf_ra_mips64, - LLDB_REGNUM_GENERIC_RA), - DEFINE_GPR_INFO(sr, nullptr, dwarf_sr_mips64, dwarf_sr_mips64, - LLDB_REGNUM_GENERIC_FLAGS), - DEFINE_GPR(mullo, nullptr, dwarf_lo_mips64, dwarf_lo_mips64, - LLDB_INVALID_REGNUM), - DEFINE_GPR(mulhi, nullptr, dwarf_hi_mips64, dwarf_hi_mips64, - LLDB_INVALID_REGNUM), - DEFINE_GPR(badvaddr, nullptr, dwarf_bad_mips64, dwarf_bad_mips64, - LLDB_INVALID_REGNUM), - DEFINE_GPR_INFO(cause, nullptr, dwarf_cause_mips64, dwarf_cause_mips64, - LLDB_INVALID_REGNUM), - DEFINE_GPR(pc, "pc", dwarf_pc_mips64, dwarf_pc_mips64, - LLDB_REGNUM_GENERIC_PC), - DEFINE_GPR_INFO(config5, nullptr, dwarf_config5_mips64, - dwarf_config5_mips64, LLDB_INVALID_REGNUM), - DEFINE_FPR(f0, nullptr, dwarf_f0_mips64, dwarf_f0_mips64, - LLDB_INVALID_REGNUM), - DEFINE_FPR(f1, nullptr, dwarf_f1_mips64, dwarf_f1_mips64, - LLDB_INVALID_REGNUM), - DEFINE_FPR(f2, nullptr, dwarf_f2_mips64, dwarf_f2_mips64, - LLDB_INVALID_REGNUM), - DEFINE_FPR(f3, nullptr, dwarf_f3_mips64, dwarf_f3_mips64, - LLDB_INVALID_REGNUM), - DEFINE_FPR(f4, nullptr, dwarf_f4_mips64, dwarf_f4_mips64, - LLDB_INVALID_REGNUM), - DEFINE_FPR(f5, nullptr, dwarf_f5_mips64, dwarf_f5_mips64, - LLDB_INVALID_REGNUM), - DEFINE_FPR(f6, nullptr, dwarf_f6_mips64, dwarf_f6_mips64, - LLDB_INVALID_REGNUM), - DEFINE_FPR(f7, nullptr, dwarf_f7_mips64, dwarf_f7_mips64, - LLDB_INVALID_REGNUM), - DEFINE_FPR(f8, nullptr, dwarf_f8_mips64, dwarf_f8_mips64, - LLDB_INVALID_REGNUM), - DEFINE_FPR(f9, nullptr, dwarf_f9_mips64, dwarf_f9_mips64, - LLDB_INVALID_REGNUM), - DEFINE_FPR(f10, nullptr, dwarf_f10_mips64, dwarf_f10_mips64, - LLDB_INVALID_REGNUM), - DEFINE_FPR(f11, nullptr, dwarf_f11_mips64, dwarf_f11_mips64, - LLDB_INVALID_REGNUM), - DEFINE_FPR(f12, nullptr, dwarf_f12_mips64, dwarf_f12_mips64, - LLDB_INVALID_REGNUM), - DEFINE_FPR(f13, nullptr, dwarf_f13_mips64, dwarf_f13_mips64, - LLDB_INVALID_REGNUM), - DEFINE_FPR(f14, nullptr, dwarf_f14_mips64, dwarf_f14_mips64, - LLDB_INVALID_REGNUM), - DEFINE_FPR(f15, nullptr, dwarf_f15_mips64, dwarf_f15_mips64, - LLDB_INVALID_REGNUM), - DEFINE_FPR(f16, nullptr, dwarf_f16_mips64, dwarf_f16_mips64, - LLDB_INVALID_REGNUM), - DEFINE_FPR(f17, nullptr, dwarf_f17_mips64, dwarf_f17_mips64, - LLDB_INVALID_REGNUM), - DEFINE_FPR(f18, nullptr, dwarf_f18_mips64, dwarf_f18_mips64, - LLDB_INVALID_REGNUM), - DEFINE_FPR(f19, nullptr, dwarf_f19_mips64, dwarf_f19_mips64, - LLDB_INVALID_REGNUM), - DEFINE_FPR(f20, nullptr, dwarf_f20_mips64, dwarf_f20_mips64, - LLDB_INVALID_REGNUM), - DEFINE_FPR(f21, nullptr, dwarf_f21_mips64, dwarf_f21_mips64, - LLDB_INVALID_REGNUM), - DEFINE_FPR(f22, nullptr, dwarf_f22_mips64, dwarf_f22_mips64, - LLDB_INVALID_REGNUM), - DEFINE_FPR(f23, nullptr, dwarf_f23_mips64, dwarf_f23_mips64, - LLDB_INVALID_REGNUM), - DEFINE_FPR(f24, nullptr, dwarf_f24_mips64, dwarf_f24_mips64, - LLDB_INVALID_REGNUM), - DEFINE_FPR(f25, nullptr, dwarf_f25_mips64, dwarf_f25_mips64, - LLDB_INVALID_REGNUM), - DEFINE_FPR(f26, nullptr, dwarf_f26_mips64, dwarf_f26_mips64, - LLDB_INVALID_REGNUM), - DEFINE_FPR(f27, nullptr, dwarf_f27_mips64, dwarf_f27_mips64, - LLDB_INVALID_REGNUM), - DEFINE_FPR(f28, nullptr, dwarf_f28_mips64, dwarf_f28_mips64, - LLDB_INVALID_REGNUM), - DEFINE_FPR(f29, nullptr, dwarf_f29_mips64, dwarf_f29_mips64, - LLDB_INVALID_REGNUM), - DEFINE_FPR(f30, nullptr, dwarf_f30_mips64, dwarf_f30_mips64, - LLDB_INVALID_REGNUM), - DEFINE_FPR(f31, nullptr, dwarf_f31_mips64, dwarf_f31_mips64, - LLDB_INVALID_REGNUM), - DEFINE_FPR_INFO(fcsr, nullptr, dwarf_fcsr_mips64, dwarf_fcsr_mips64, - LLDB_INVALID_REGNUM), - DEFINE_FPR_INFO(fir, nullptr, dwarf_fir_mips64, dwarf_fir_mips64, - LLDB_INVALID_REGNUM), - DEFINE_FPR_INFO(config5, nullptr, dwarf_config5_mips64, - dwarf_config5_mips64, LLDB_INVALID_REGNUM), - DEFINE_MSA(w0, nullptr, dwarf_w0_mips64, dwarf_w0_mips64, - LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_MSA(w1, nullptr, dwarf_w1_mips64, dwarf_w1_mips64, - LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_MSA(w2, nullptr, dwarf_w2_mips64, dwarf_w2_mips64, - LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_MSA(w3, nullptr, dwarf_w3_mips64, dwarf_w3_mips64, - LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_MSA(w4, nullptr, dwarf_w4_mips64, dwarf_w4_mips64, - LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_MSA(w5, nullptr, dwarf_w5_mips64, dwarf_w5_mips64, - LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_MSA(w6, nullptr, dwarf_w6_mips64, dwarf_w6_mips64, - LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_MSA(w7, nullptr, dwarf_w7_mips64, dwarf_w7_mips64, - LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_MSA(w8, nullptr, dwarf_w8_mips64, dwarf_w8_mips64, - LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_MSA(w9, nullptr, dwarf_w9_mips64, dwarf_w9_mips64, - LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_MSA(w10, nullptr, dwarf_w10_mips64, dwarf_w10_mips64, - LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_MSA(w11, nullptr, dwarf_w11_mips64, dwarf_w11_mips64, - LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_MSA(w12, nullptr, dwarf_w12_mips64, dwarf_w12_mips64, - LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_MSA(w13, nullptr, dwarf_w13_mips64, dwarf_w13_mips64, - LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_MSA(w14, nullptr, dwarf_w14_mips64, dwarf_w14_mips64, - LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_MSA(w15, nullptr, dwarf_w15_mips64, dwarf_w15_mips64, - LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_MSA(w16, nullptr, dwarf_w16_mips64, dwarf_w16_mips64, - LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_MSA(w17, nullptr, dwarf_w17_mips64, dwarf_w17_mips64, - LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_MSA(w18, nullptr, dwarf_w18_mips64, dwarf_w18_mips64, - LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_MSA(w19, nullptr, dwarf_w19_mips64, dwarf_w19_mips64, - LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_MSA(w20, nullptr, dwarf_w10_mips64, dwarf_w20_mips64, - LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_MSA(w21, nullptr, dwarf_w21_mips64, dwarf_w21_mips64, - LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_MSA(w22, nullptr, dwarf_w22_mips64, dwarf_w22_mips64, - LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_MSA(w23, nullptr, dwarf_w23_mips64, dwarf_w23_mips64, - LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_MSA(w24, nullptr, dwarf_w24_mips64, dwarf_w24_mips64, - LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_MSA(w25, nullptr, dwarf_w25_mips64, dwarf_w25_mips64, - LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_MSA(w26, nullptr, dwarf_w26_mips64, dwarf_w26_mips64, - LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_MSA(w27, nullptr, dwarf_w27_mips64, dwarf_w27_mips64, - LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_MSA(w28, nullptr, dwarf_w28_mips64, dwarf_w28_mips64, - LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_MSA(w29, nullptr, dwarf_w29_mips64, dwarf_w29_mips64, - LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_MSA(w30, nullptr, dwarf_w30_mips64, dwarf_w30_mips64, - LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_MSA(w31, nullptr, dwarf_w31_mips64, dwarf_w31_mips64, - LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_MSA_INFO(mcsr, nullptr, dwarf_mcsr_mips64, dwarf_mcsr_mips64, - LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_MSA_INFO(mir, nullptr, dwarf_mir_mips64, dwarf_mir_mips64, - LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_MSA_INFO(fcsr, nullptr, dwarf_fcsr_mips64, dwarf_fcsr_mips64, - LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_MSA_INFO(fir, nullptr, dwarf_fir_mips64, dwarf_fir_mips64, - LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), - DEFINE_MSA_INFO(config5, nullptr, dwarf_config5_mips64, - dwarf_config5_mips64, LLDB_INVALID_REGNUM, - LLDB_INVALID_REGNUM) -#endif }; static_assert((sizeof(g_register_infos_mips64) / diff --git a/lldb/source/Plugins/Process/Utility/lldb-mips-linux-register-enums.h b/lldb/source/Plugins/Process/Utility/lldb-mips-linux-register-enums.h deleted file mode 100644 index 348af27d2809..000000000000 --- a/lldb/source/Plugins/Process/Utility/lldb-mips-linux-register-enums.h +++ /dev/null @@ -1,360 +0,0 @@ -//===-- lldb-mips-linux-register-enums.h -------------------------------*- C++ -//-*-===// -// -// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. -// See https://llvm.org/LICENSE.txt for license information. -// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception -// -//===----------------------------------------------------------------------===// - -#ifndef LLDB_SOURCE_PLUGINS_PROCESS_UTILITY_LLDB_MIPS_LINUX_REGISTER_ENUMS_H -#define LLDB_SOURCE_PLUGINS_PROCESS_UTILITY_LLDB_MIPS_LINUX_REGISTER_ENUMS_H - -namespace lldb_private { -// LLDB register codes (e.g. RegisterKind == eRegisterKindLLDB) - -// Internal codes for all mips registers. -enum { - k_first_gpr_mips, - gpr_zero_mips = k_first_gpr_mips, - gpr_r1_mips, - gpr_r2_mips, - gpr_r3_mips, - gpr_r4_mips, - gpr_r5_mips, - gpr_r6_mips, - gpr_r7_mips, - gpr_r8_mips, - gpr_r9_mips, - gpr_r10_mips, - gpr_r11_mips, - gpr_r12_mips, - gpr_r13_mips, - gpr_r14_mips, - gpr_r15_mips, - gpr_r16_mips, - gpr_r17_mips, - gpr_r18_mips, - gpr_r19_mips, - gpr_r20_mips, - gpr_r21_mips, - gpr_r22_mips, - gpr_r23_mips, - gpr_r24_mips, - gpr_r25_mips, - gpr_r26_mips, - gpr_r27_mips, - gpr_gp_mips, - gpr_sp_mips, - gpr_r30_mips, - gpr_ra_mips, - gpr_sr_mips, - gpr_mullo_mips, - gpr_mulhi_mips, - gpr_badvaddr_mips, - gpr_cause_mips, - gpr_pc_mips, - gpr_config5_mips, - - k_last_gpr_mips = gpr_config5_mips, - - k_first_fpr_mips, - fpr_f0_mips = k_first_fpr_mips, - fpr_f1_mips, - fpr_f2_mips, - fpr_f3_mips, - fpr_f4_mips, - fpr_f5_mips, - fpr_f6_mips, - fpr_f7_mips, - fpr_f8_mips, - fpr_f9_mips, - fpr_f10_mips, - fpr_f11_mips, - fpr_f12_mips, - fpr_f13_mips, - fpr_f14_mips, - fpr_f15_mips, - fpr_f16_mips, - fpr_f17_mips, - fpr_f18_mips, - fpr_f19_mips, - fpr_f20_mips, - fpr_f21_mips, - fpr_f22_mips, - fpr_f23_mips, - fpr_f24_mips, - fpr_f25_mips, - fpr_f26_mips, - fpr_f27_mips, - fpr_f28_mips, - fpr_f29_mips, - fpr_f30_mips, - fpr_f31_mips, - fpr_fcsr_mips, - fpr_fir_mips, - fpr_config5_mips, - k_last_fpr_mips = fpr_config5_mips, - - k_first_msa_mips, - msa_w0_mips = k_first_msa_mips, - msa_w1_mips, - msa_w2_mips, - msa_w3_mips, - msa_w4_mips, - msa_w5_mips, - msa_w6_mips, - msa_w7_mips, - msa_w8_mips, - msa_w9_mips, - msa_w10_mips, - msa_w11_mips, - msa_w12_mips, - msa_w13_mips, - msa_w14_mips, - msa_w15_mips, - msa_w16_mips, - msa_w17_mips, - msa_w18_mips, - msa_w19_mips, - msa_w20_mips, - msa_w21_mips, - msa_w22_mips, - msa_w23_mips, - msa_w24_mips, - msa_w25_mips, - msa_w26_mips, - msa_w27_mips, - msa_w28_mips, - msa_w29_mips, - msa_w30_mips, - msa_w31_mips, - msa_fcsr_mips, - msa_fir_mips, - msa_mcsr_mips, - msa_mir_mips, - msa_config5_mips, - k_last_msa_mips = msa_config5_mips, - - k_num_registers_mips, - - k_num_gpr_registers_mips = k_last_gpr_mips - k_first_gpr_mips + 1, - k_num_fpr_registers_mips = k_last_fpr_mips - k_first_fpr_mips + 1, - k_num_msa_registers_mips = k_last_msa_mips - k_first_msa_mips + 1, - k_num_user_registers_mips = k_num_gpr_registers_mips + - k_num_fpr_registers_mips + - k_num_msa_registers_mips -}; - -// Internal codes for all mips64 registers. -enum { - k_first_gpr_mips64, - gpr_zero_mips64 = k_first_gpr_mips64, - gpr_r1_mips64, - gpr_r2_mips64, - gpr_r3_mips64, - gpr_r4_mips64, - gpr_r5_mips64, - gpr_r6_mips64, - gpr_r7_mips64, - gpr_r8_mips64, - gpr_r9_mips64, - gpr_r10_mips64, - gpr_r11_mips64, - gpr_r12_mips64, - gpr_r13_mips64, - gpr_r14_mips64, - gpr_r15_mips64, - gpr_r16_mips64, - gpr_r17_mips64, - gpr_r18_mips64, - gpr_r19_mips64, - gpr_r20_mips64, - gpr_r21_mips64, - gpr_r22_mips64, - gpr_r23_mips64, - gpr_r24_mips64, - gpr_r25_mips64, - gpr_r26_mips64, - gpr_r27_mips64, - gpr_gp_mips64, - gpr_sp_mips64, - gpr_r30_mips64, - gpr_ra_mips64, - gpr_sr_mips64, - gpr_mullo_mips64, - gpr_mulhi_mips64, - gpr_badvaddr_mips64, - gpr_cause_mips64, - gpr_pc_mips64, - gpr_config5_mips64, - k_last_gpr_mips64 = gpr_config5_mips64, - - k_first_fpr_mips64, - fpr_f0_mips64 = k_first_fpr_mips64, - fpr_f1_mips64, - fpr_f2_mips64, - fpr_f3_mips64, - fpr_f4_mips64, - fpr_f5_mips64, - fpr_f6_mips64, - fpr_f7_mips64, - fpr_f8_mips64, - fpr_f9_mips64, - fpr_f10_mips64, - fpr_f11_mips64, - fpr_f12_mips64, - fpr_f13_mips64, - fpr_f14_mips64, - fpr_f15_mips64, - fpr_f16_mips64, - fpr_f17_mips64, - fpr_f18_mips64, - fpr_f19_mips64, - fpr_f20_mips64, - fpr_f21_mips64, - fpr_f22_mips64, - fpr_f23_mips64, - fpr_f24_mips64, - fpr_f25_mips64, - fpr_f26_mips64, - fpr_f27_mips64, - fpr_f28_mips64, - fpr_f29_mips64, - fpr_f30_mips64, - fpr_f31_mips64, - fpr_fcsr_mips64, - fpr_fir_mips64, - fpr_config5_mips64, - k_last_fpr_mips64 = fpr_config5_mips64, - - k_first_msa_mips64, - msa_w0_mips64 = k_first_msa_mips64, - msa_w1_mips64, - msa_w2_mips64, - msa_w3_mips64, - msa_w4_mips64, - msa_w5_mips64, - msa_w6_mips64, - msa_w7_mips64, - msa_w8_mips64, - msa_w9_mips64, - msa_w10_mips64, - msa_w11_mips64, - msa_w12_mips64, - msa_w13_mips64, - msa_w14_mips64, - msa_w15_mips64, - msa_w16_mips64, - msa_w17_mips64, - msa_w18_mips64, - msa_w19_mips64, - msa_w20_mips64, - msa_w21_mips64, - msa_w22_mips64, - msa_w23_mips64, - msa_w24_mips64, - msa_w25_mips64, - msa_w26_mips64, - msa_w27_mips64, - msa_w28_mips64, - msa_w29_mips64, - msa_w30_mips64, - msa_w31_mips64, - msa_fcsr_mips64, - msa_fir_mips64, - msa_mcsr_mips64, - msa_mir_mips64, - msa_config5_mips64, - k_last_msa_mips64 = msa_config5_mips64, - - k_num_registers_mips64, - - k_num_gpr_registers_mips64 = k_last_gpr_mips64 - k_first_gpr_mips64 + 1, - k_num_fpr_registers_mips64 = k_last_fpr_mips64 - k_first_fpr_mips64 + 1, - k_num_msa_registers_mips64 = k_last_msa_mips64 - k_first_msa_mips64 + 1, - k_num_user_registers_mips64 = k_num_gpr_registers_mips64 + - k_num_fpr_registers_mips64 + - k_num_msa_registers_mips64 -}; - -// Register no. for RegisterKind = eRegisterKindProcessPlugin -// The ptrace request PTRACE_PEEKUSER/PTRACE_POKEUSER used this number -enum { - ptrace_zero_mips, - ptrace_r1_mips, - ptrace_r2_mips, - ptrace_r3_mips, - ptrace_r4_mips, - ptrace_r5_mips, - ptrace_r6_mips, - ptrace_r7_mips, - ptrace_r8_mips, - ptrace_r9_mips, - ptrace_r10_mips, - ptrace_r11_mips, - ptrace_r12_mips, - ptrace_r13_mips, - ptrace_r14_mips, - ptrace_r15_mips, - ptrace_r16_mips, - ptrace_r17_mips, - ptrace_r18_mips, - ptrace_r19_mips, - ptrace_r20_mips, - ptrace_r21_mips, - ptrace_r22_mips, - ptrace_r23_mips, - ptrace_r24_mips, - ptrace_r25_mips, - ptrace_r26_mips, - ptrace_r27_mips, - ptrace_gp_mips, - ptrace_sp_mips, - ptrace_r30_mips, - ptrace_ra_mips, - ptrace_f0_mips, - ptrace_f1_mips, - ptrace_f2_mips, - ptrace_f3_mips, - ptrace_f4_mips, - ptrace_f5_mips, - ptrace_f6_mips, - ptrace_f7_mips, - ptrace_f8_mips, - ptrace_f9_mips, - ptrace_f10_mips, - ptrace_f11_mips, - ptrace_f12_mips, - ptrace_f13_mips, - ptrace_f14_mips, - ptrace_f15_mips, - ptrace_f16_mips, - ptrace_f17_mips, - ptrace_f18_mips, - ptrace_f19_mips, - ptrace_f20_mips, - ptrace_f21_mips, - ptrace_f22_mips, - ptrace_f23_mips, - ptrace_f24_mips, - ptrace_f25_mips, - ptrace_f26_mips, - ptrace_f27_mips, - ptrace_f28_mips, - ptrace_f29_mips, - ptrace_f30_mips, - ptrace_f31_mips, - ptrace_pc_mips, - ptrace_cause_mips, - ptrace_badvaddr_mips, - ptrace_mulhi_mips, - ptrace_mullo_mips, - ptrace_fcsr_mips, - ptrace_fir_mips, - ptrace_sr_mips, - ptrace_config5_mips -}; -} - -#endif // LLDB_SOURCE_PLUGINS_PROCESS_UTILITY_LLDB_MIPS_LINUX_REGISTER_ENUMS_H diff --git a/lldb/source/Plugins/Process/elf-core/ThreadElfCore.cpp b/lldb/source/Plugins/Process/elf-core/ThreadElfCore.cpp index 76c0c2843e6d..fe646b508343 100644 --- a/lldb/source/Plugins/Process/elf-core/ThreadElfCore.cpp +++ b/lldb/source/Plugins/Process/elf-core/ThreadElfCore.cpp @@ -18,8 +18,6 @@ #include "Plugins/Process/Utility/RegisterContextFreeBSD_powerpc.h" #include "Plugins/Process/Utility/RegisterContextFreeBSD_x86_64.h" #include "Plugins/Process/Utility/RegisterContextLinux_i386.h" -#include "Plugins/Process/Utility/RegisterContextLinux_mips.h" -#include "Plugins/Process/Utility/RegisterContextLinux_mips64.h" #include "Plugins/Process/Utility/RegisterContextLinux_s390x.h" #include "Plugins/Process/Utility/RegisterContextLinux_x86_64.h" #include "Plugins/Process/Utility/RegisterContextNetBSD_x86_64.h" @@ -122,14 +120,6 @@ ThreadElfCore::CreateRegisterContextForFrame(StackFrame *frame) { switch (arch.GetMachine()) { case llvm::Triple::aarch64: break; - case llvm::Triple::mipsel: - case llvm::Triple::mips: - reg_interface = new RegisterContextLinux_mips(arch); - break; - case llvm::Triple::mips64el: - case llvm::Triple::mips64: - reg_interface = new RegisterContextLinux_mips64(arch); - break; case llvm::Triple::ppc64le: reg_interface = new RegisterInfoPOSIX_ppc64le(arch); break; diff --git a/lldb/test/API/functionalities/postmortem/elf-core/TestLinuxCore.py b/lldb/test/API/functionalities/postmortem/elf-core/TestLinuxCore.py index 3662a2b91d45..26e85e34da73 100644 --- a/lldb/test/API/functionalities/postmortem/elf-core/TestLinuxCore.py +++ b/lldb/test/API/functionalities/postmortem/elf-core/TestLinuxCore.py @@ -23,19 +23,14 @@ class LinuxCoreTestCase(TestBase): _i386_pid = 32306 _x86_64_pid = 32259 _s390x_pid = 1045 - _mips64_n64_pid = 25619 - _mips64_n32_pid = 3670 - _mips_o32_pid = 3532 _ppc64le_pid = 28147 _aarch64_regions = 4 _i386_regions = 4 _x86_64_regions = 5 _s390x_regions = 2 - _mips_regions = 5 _ppc64le_regions = 2 - @skipIf(triple='^mips') @skipIfLLVMTargetMissing("AArch64") @skipIfReproducer # lldb::FileSP used in typemap cannot be instrumented. def test_aarch64(self): @@ -43,35 +38,12 @@ def test_aarch64(self): self.do_test("linux-aarch64", self._aarch64_pid, self._aarch64_regions, "a.out") - @skipIf(triple='^mips') @skipIfLLVMTargetMissing("X86") @skipIfReproducer # lldb::FileSP used in typemap cannot be instrumented. def test_i386(self): """Test that lldb can read the process information from an i386 linux core file.""" self.do_test("linux-i386", self._i386_pid, self._i386_regions, "a.out") - @skipIfLLVMTargetMissing("Mips") - @skipIfReproducer # lldb::FileSP used in typemap cannot be instrumented. - def test_mips_o32(self): - """Test that lldb can read the process information from an MIPS O32 linux core file.""" - self.do_test("linux-mipsel-gnuabio32", self._mips_o32_pid, - self._mips_regions, "linux-mipsel-gn") - - @skipIfLLVMTargetMissing("Mips") - @skipIfReproducer # lldb::FileSP used in typemap cannot be instrumented. - def test_mips_n32(self): - """Test that lldb can read the process information from an MIPS N32 linux core file """ - self.do_test("linux-mips64el-gnuabin32", self._mips64_n32_pid, - self._mips_regions, "linux-mips64el-") - - @skipIfLLVMTargetMissing("Mips") - @skipIfReproducer # lldb::FileSP used in typemap cannot be instrumented. - def test_mips_n64(self): - """Test that lldb can read the process information from an MIPS N64 linux core file """ - self.do_test("linux-mips64el-gnuabi64", self._mips64_n64_pid, - self._mips_regions, "linux-mips64el-") - - @skipIf(triple='^mips') @skipIfLLVMTargetMissing("PowerPC") @skipIfReproducer # lldb::FileSP used in typemap cannot be instrumented. def test_ppc64le(self): @@ -79,7 +51,6 @@ def test_ppc64le(self): self.do_test("linux-ppc64le", self._ppc64le_pid, self._ppc64le_regions, "linux-ppc64le.ou") - @skipIf(triple='^mips') @skipIfLLVMTargetMissing("X86") @skipIfReproducer # lldb::FileSP used in typemap cannot be instrumented. def test_x86_64(self): @@ -87,7 +58,6 @@ def test_x86_64(self): self.do_test("linux-x86_64", self._x86_64_pid, self._x86_64_regions, "a.out") - @skipIf(triple='^mips') @skipIfLLVMTargetMissing("SystemZ") @skipIfReproducer # lldb::FileSP used in typemap cannot be instrumented. def test_s390x(self): @@ -95,7 +65,6 @@ def test_s390x(self): self.do_test("linux-s390x", self._s390x_pid, self._s390x_regions, "a.out") - @skipIf(triple='^mips') @skipIfLLVMTargetMissing("X86") @skipIfReproducer # lldb::FileSP used in typemap cannot be instrumented. def test_same_pid_running(self): @@ -124,7 +93,6 @@ def test_same_pid_running(self): self.do_test(self.getBuildArtifact("linux-x86_64-pid"), os.getpid(), self._x86_64_regions, "a.out") - @skipIf(triple='^mips') @skipIfLLVMTargetMissing("X86") @skipIfReproducer # lldb::FileSP used in typemap cannot be instrumented. def test_two_cores_same_pid(self): @@ -156,7 +124,6 @@ def test_two_cores_same_pid(self): "a.out") - @skipIf(triple='^mips') @skipIfLLVMTargetMissing("X86") @skipIfWindows @skipIfReproducer @@ -173,7 +140,6 @@ def test_read_memory(self): self.assertEqual(len(bytesread), 16) self.dbg.DeleteTarget(target) - @skipIf(triple='^mips') @skipIfLLVMTargetMissing("X86") def test_FPR_SSE(self): # check x86_64 core file @@ -224,7 +190,6 @@ def test_FPR_SSE(self): self.expect("register read {}".format(regname), substrs=["{} = {}".format(regname, value)]) - @skipIf(triple='^mips') @skipIfLLVMTargetMissing("X86") @skipIfReproducer # lldb::FileSP used in typemap cannot be instrumented. def test_i386_sysroot(self): @@ -251,7 +216,6 @@ def test_i386_sysroot(self): self.dbg.DeleteTarget(target) - @skipIf(triple='^mips') @skipIfLLVMTargetMissing("X86") @skipIfWindows @skipIfReproducer # lldb::FileSP used in typemap cannot be instrumented. @@ -293,7 +257,6 @@ def test_x86_64_sysroot(self): self.dbg.DeleteTarget(target) - @skipIf(triple='^mips') @skipIfLLVMTargetMissing("AArch64") @expectedFailureAll(archs=["aarch64"], oslist=["freebsd"], bugnumber="llvm.org/pr49415") @@ -351,7 +314,6 @@ def test_aarch64_regs(self): self.expect("register read --all") - @skipIf(triple='^mips') @skipIfLLVMTargetMissing("AArch64") @expectedFailureAll(archs=["aarch64"], oslist=["freebsd"], bugnumber="llvm.org/pr49415") @@ -440,7 +402,6 @@ def test_aarch64_sve_regs_fpsimd(self): self.expect("register read --all") - @skipIf(triple='^mips') @skipIfLLVMTargetMissing("AArch64") def test_aarch64_sve_regs_full(self): # check 64 bit ARM core files @@ -482,7 +443,6 @@ def test_aarch64_sve_regs_full(self): self.expect("register read --all") - @skipIf(triple='^mips') @skipIfLLVMTargetMissing("ARM") def test_arm_core(self): # check 32 bit ARM core file diff --git a/lldb/test/API/functionalities/postmortem/elf-core/linux-mips64el-gnuabi64.core b/lldb/test/API/functionalities/postmortem/elf-core/linux-mips64el-gnuabi64.core deleted file mode 100644 index 272c627cd244..000000000000 Binary files a/lldb/test/API/functionalities/postmortem/elf-core/linux-mips64el-gnuabi64.core and /dev/null diff er diff --git a/lldb/test/API/functionalities/postmortem/elf-core/linux-mips64el-gnuabi64.out b/lldb/test/API/functionalities/postmortem/elf-core/linux-mips64el-gnuabi64.out deleted file mode 100755 index a230aa4251ae..000000000000 Binary files a/lldb/test/API/functionalities/postmortem/elf-core/linux-mips64el-gnuabi64.out and /dev/null diff er diff --git a/lldb/test/API/functionalities/postmortem/elf-core/linux-mips64el-gnuabin32.core b/lldb/test/API/functionalities/postmortem/elf-core/linux-mips64el-gnuabin32.core deleted file mode 100644 index 19c8100bdb11..000000000000 Binary files a/lldb/test/API/functionalities/postmortem/elf-core/linux-mips64el-gnuabin32.core and /dev/null diff er diff --git a/lldb/test/API/functionalities/postmortem/elf-core/linux-mips64el-gnuabin32.out b/lldb/test/API/functionalities/postmortem/elf-core/linux-mips64el-gnuabin32.out deleted file mode 100755 index d1293a71a856..000000000000 Binary files a/lldb/test/API/functionalities/postmortem/elf-core/linux-mips64el-gnuabin32.out and /dev/null diff er diff --git a/lldb/test/API/functionalities/postmortem/elf-core/linux-mipsel-gnuabio32.core b/lldb/test/API/functionalities/postmortem/elf-core/linux-mipsel-gnuabio32.core deleted file mode 100644 index 2ad41395a2e0..000000000000 Binary files a/lldb/test/API/functionalities/postmortem/elf-core/linux-mipsel-gnuabio32.core and /dev/null diff er diff --git a/lldb/test/API/functionalities/postmortem/elf-core/linux-mipsel-gnuabio32.out b/lldb/test/API/functionalities/postmortem/elf-core/linux-mipsel-gnuabio32.out deleted file mode 100755 index dc809c8da482..000000000000 Binary files a/lldb/test/API/functionalities/postmortem/elf-core/linux-mipsel-gnuabio32.out and /dev/null diff er _______________________________________________ lldb-commits mailing list lldb-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-commits