[llvm-branch-commits] [BOLT] Function matching with function calls as anchors (PR #96596)

2024-06-24 Thread shaw young via llvm-branch-commits
https://github.com/shawbyoung created https://github.com/llvm/llvm-project/pull/96596 Test Plan: tbd ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [BOLT] Name similarity function matching (PR #95884)

2024-06-24 Thread shaw young via llvm-branch-commits
https://github.com/shawbyoung updated https://github.com/llvm/llvm-project/pull/95884 >From 34652b2eebc62218c50a23509ce99937385c30e6 Mon Sep 17 00:00:00 2001 From: shawbyoung Date: Thu, 20 Jun 2024 23:42:00 -0700 Subject: [PATCH 1/7] spr amend Created using spr 1.3.4 ---

[llvm-branch-commits] [llvm] [BOLT] Name similarity function matching (PR #95884)

2024-06-24 Thread shaw young via llvm-branch-commits
https://github.com/shawbyoung updated https://github.com/llvm/llvm-project/pull/95884 >From 34652b2eebc62218c50a23509ce99937385c30e6 Mon Sep 17 00:00:00 2001 From: shawbyoung Date: Thu, 20 Jun 2024 23:42:00 -0700 Subject: [PATCH 1/7] spr amend Created using spr 1.3.4 ---

[llvm-branch-commits] [libcxx] Add release note for #95264 (PR #96116)

2024-06-24 Thread Louis Dionne via llvm-branch-commits
ldionne wrote: > We don't have a great way to add release notes after the final release. I > added this to the release announcement do you think that is enough? Yes I think that is fine. https://github.com/llvm/llvm-project/pull/96116 ___

[llvm-branch-commits] [libcxx] Add release note for #95264 (PR #96116)

2024-06-24 Thread Louis Dionne via llvm-branch-commits
https://github.com/ldionne closed https://github.com/llvm/llvm-project/pull/96116 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [BOLT] Name similarity function matching (PR #95884)

2024-06-24 Thread shaw young via llvm-branch-commits
https://github.com/shawbyoung updated https://github.com/llvm/llvm-project/pull/95884 >From 34652b2eebc62218c50a23509ce99937385c30e6 Mon Sep 17 00:00:00 2001 From: shawbyoung Date: Thu, 20 Jun 2024 23:42:00 -0700 Subject: [PATCH 1/7] spr amend Created using spr 1.3.4 ---

[llvm-branch-commits] [libcxx] Add release note for #95264 (PR #96116)

2024-06-24 Thread Tom Stellard via llvm-branch-commits
tstellar wrote: We don't have a great way to add release notes after the final release. I added this to the release announcement do you think that is enough? https://github.com/llvm/llvm-project/pull/96116 ___ llvm-branch-commits mailing list

[llvm-branch-commits] [llvm] [BOLT] Name similarity function matching (PR #95884)

2024-06-24 Thread shaw young via llvm-branch-commits
https://github.com/shawbyoung converted_to_draft https://github.com/llvm/llvm-project/pull/95884 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [BOLT][NFC] Move opts::Lite to CommandLineOpts.cpp (PR #96571)

2024-06-24 Thread shaw young via llvm-branch-commits
https://github.com/shawbyoung closed https://github.com/llvm/llvm-project/pull/96571 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [BOLT][NFC] Move opts::Lite to CommandLineOpts.cpp (PR #96571)

2024-06-24 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-bolt Author: shaw young (shawbyoung) Changes Test Plan: n/a --- Full diff: https://github.com/llvm/llvm-project/pull/96571.diff 2 Files Affected: - (modified) bolt/lib/Rewrite/RewriteInstance.cpp (-3) - (modified)

[llvm-branch-commits] [BOLT][NFC] Move opts::Lite to CommandLineOpts.cpp (PR #96571)

2024-06-24 Thread shaw young via llvm-branch-commits
https://github.com/shawbyoung created https://github.com/llvm/llvm-project/pull/96571 Test Plan: n/a ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [BOLT] Hash-based function matching (PR #95821)

2024-06-24 Thread shaw young via llvm-branch-commits
https://github.com/shawbyoung updated https://github.com/llvm/llvm-project/pull/95821 >From 92212c96ea169d26ac10bf8d750539bc5dd72c49 Mon Sep 17 00:00:00 2001 From: shawbyoung Date: Mon, 17 Jun 2024 15:39:02 -0700 Subject: [PATCH 01/20] spr amend Created using spr 1.3.4 ---

[llvm-branch-commits] [llvm] [BOLT] Hash-based function matching (PR #95821)

2024-06-24 Thread shaw young via llvm-branch-commits
https://github.com/shawbyoung updated https://github.com/llvm/llvm-project/pull/95821 >From 92212c96ea169d26ac10bf8d750539bc5dd72c49 Mon Sep 17 00:00:00 2001 From: shawbyoung Date: Mon, 17 Jun 2024 15:39:02 -0700 Subject: [PATCH 01/20] spr amend Created using spr 1.3.4 ---

[llvm-branch-commits] [llvm] AMDGPU: Add subtarget feature for memory atomic fadd f64 (PR #96444)

2024-06-24 Thread Stanislav Mekhanoshin via llvm-branch-commits
https://github.com/rampitec approved this pull request. https://github.com/llvm/llvm-project/pull/96444 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] AMDGPU: Add subtarget feature for memory atomic fadd f64 (PR #96444)

2024-06-24 Thread Matt Arsenault via llvm-branch-commits
https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/96444 >From baaf96125e8f913a161f1c13216618a3de128182 Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Sun, 23 Jun 2024 17:07:53 +0200 Subject: [PATCH] AMDGPU: Add subtarget feature for memory atomic fadd f64 ---

[llvm-branch-commits] Reapply "[llvm][RISCV] Enable trailing fences for seq-cst stores by default (#87376)" (PR #90267)

2024-06-24 Thread Paul Kirth via llvm-branch-commits
https://github.com/ilovepi updated https://github.com/llvm/llvm-project/pull/90267 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] Reapply "[llvm][RISCV] Enable trailing fences for seq-cst stores by default (#87376)" (PR #90267)

2024-06-24 Thread Paul Kirth via llvm-branch-commits
https://github.com/ilovepi edited https://github.com/llvm/llvm-project/pull/90267 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] Reapply "[llvm][RISCV] Enable trailing fences for seq-cst stores by default (#87376)" (PR #90267)

2024-06-24 Thread Paul Kirth via llvm-branch-commits
https://github.com/ilovepi updated https://github.com/llvm/llvm-project/pull/90267 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [libcxx] Add release note for #95264 (PR #96116)

2024-06-24 Thread Louis Dionne via llvm-branch-commits
ldionne wrote: Gentle ping @tstellar, do we want to merge this? The CI issues are unrelated. https://github.com/llvm/llvm-project/pull/96116 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org

[llvm-branch-commits] [llvm] AMDGPU: Add subtarget feature for global atomic fadd denormal support (PR #96443)

2024-06-24 Thread Stanislav Mekhanoshin via llvm-branch-commits
https://github.com/rampitec approved this pull request. https://github.com/llvm/llvm-project/pull/96443 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [flang] 0f6f6dd - Revert "[Flang][Driver] Add -print-resource-dir command line flag to emit Fla…"

2024-06-24 Thread via llvm-branch-commits
Author: David Truby Date: 2024-06-24T21:53:39+01:00 New Revision: 0f6f6ddbc0d84d2df23df8c8a771ace3c0dca988 URL: https://github.com/llvm/llvm-project/commit/0f6f6ddbc0d84d2df23df8c8a771ace3c0dca988 DIFF: https://github.com/llvm/llvm-project/commit/0f6f6ddbc0d84d2df23df8c8a771ace3c0dca988.diff

[llvm-branch-commits] [llvm] AMDGPU: Add subtarget feature for global atomic fadd denormal support (PR #96443)

2024-06-24 Thread Matt Arsenault via llvm-branch-commits
arsenm wrote: > It is worse than that. It behaves differently depending on where atomic is > executed. There is no single answer if this instruction supports denorms or > not. That doesn't matter. The flat case that sometimes flushes is just a no. Flushing is never a guarantee, we only need

[llvm-branch-commits] [llvm] [BOLT] Hash-based function matching (PR #95821)

2024-06-24 Thread shaw young via llvm-branch-commits
https://github.com/shawbyoung updated https://github.com/llvm/llvm-project/pull/95821 >From 92212c96ea169d26ac10bf8d750539bc5dd72c49 Mon Sep 17 00:00:00 2001 From: shawbyoung Date: Mon, 17 Jun 2024 15:39:02 -0700 Subject: [PATCH 01/20] spr amend Created using spr 1.3.4 ---

[llvm-branch-commits] [mlir] [mlir][Transforms][NFC] Dialect Conversion: Move argument materialization logic (PR #96329)

2024-06-24 Thread Oleksandr Alex Zinenko via llvm-branch-commits
https://github.com/ftynse approved this pull request. https://github.com/llvm/llvm-project/pull/96329 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [sanitizer] Rename DEFINE_REAL_PTHREAD_FUNCTIONS (PR #96527)

2024-06-24 Thread Florian Mayer via llvm-branch-commits
https://github.com/fmayer approved this pull request. https://github.com/llvm/llvm-project/pull/96527 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] AMDGPU: Add a subtarget feature for fine-grained remote memory support (PR #96442)

2024-06-24 Thread Yaxun Liu via llvm-branch-commits
@@ -788,6 +788,14 @@ def FeatureFlatAtomicFaddF32Inst "Has flat_atomic_add_f32 instruction" >; +def FeatureAgentScopeFineGrainedRemoteMemoryAtomics + : SubtargetFeature<"agent-scope-fine-grained-remote-memory-atomics", + "HasAgentScopeFineGrainedRemoteMemoryAtomics", +

[llvm-branch-commits] [sanitizer] Rename DEFINE_REAL_PTHREAD_FUNCTIONS (PR #96527)

2024-06-24 Thread Vitaly Buka via llvm-branch-commits
https://github.com/vitalybuka edited https://github.com/llvm/llvm-project/pull/96527 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [sanitizer] Rename DEFINE_REAL_PTHREAD_FUNCTIONS (PR #96527)

2024-06-24 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-pgo Author: Vitaly Buka (vitalybuka) Changes We use REAL() calls in interceptors, but DEFINE_REAL_PTHREAD_FUNCTIONS has nothing to do with them and only used for internal maintenance threads. --- Full diff:

[llvm-branch-commits] [sanitizer] Rename DEFINE_REAL_PTHREAD_FUNCTIONS (PR #96527)

2024-06-24 Thread Vitaly Buka via llvm-branch-commits
https://github.com/vitalybuka created https://github.com/llvm/llvm-project/pull/96527 We use REAL() calls in interceptors, but DEFINE_REAL_PTHREAD_FUNCTIONS has nothing to do with them and only used for internal maintenance threads. ___

[llvm-branch-commits] [clang][misexpect] Add support to clang for profitable annotation diagnostics (PR #96525)

2024-06-24 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-llvm-transforms @llvm/pr-subscribers-clang-driver Author: Paul Kirth (ilovepi) Changes Add basic plumbing to clang so that diagnostics can be surfaced to users. --- Full diff: https://github.com/llvm/llvm-project/pull/96525.diff 9 Files Affected: -

[llvm-branch-commits] [misexpect] Support diagnostics from frontend profile data (PR #96524)

2024-06-24 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-pgo @llvm/pr-subscribers-llvm-transforms Author: Paul Kirth (ilovepi) Changes --- Full diff: https://github.com/llvm/llvm-project/pull/96524.diff 3 Files Affected: - (modified) llvm/lib/Transforms/Scalar/LowerExpectIntrinsic.cpp (+18) - (modified)

[llvm-branch-commits] [clang][misexpect] Add support to clang for profitable annotation diagnostics (PR #96525)

2024-06-24 Thread Paul Kirth via llvm-branch-commits
https://github.com/ilovepi created https://github.com/llvm/llvm-project/pull/96525 Add basic plumbing to clang so that diagnostics can be surfaced to users. ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org

[llvm-branch-commits] [llvm][misexpect] Enable diagnostics for profitable llvm.expect annotations (PR #96523)

2024-06-24 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-llvm-transforms @llvm/pr-subscribers-pgo Author: Paul Kirth (ilovepi) Changes Issue #56502 describes an enhancement related to the use of llvm.expect. The request is for a diagnostic mode that can identify branches that would benefit from the use of

[llvm-branch-commits] [misexpect] Support diagnostics from frontend profile data (PR #96524)

2024-06-24 Thread Paul Kirth via llvm-branch-commits
https://github.com/ilovepi created https://github.com/llvm/llvm-project/pull/96524 None ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm][misexpect] Enable diagnostics for profitable llvm.expect annotations (PR #96523)

2024-06-24 Thread Paul Kirth via llvm-branch-commits
https://github.com/ilovepi created https://github.com/llvm/llvm-project/pull/96523 Issue #56502 describes an enhancement related to the use of llvm.expect. The request is for a diagnostic mode that can identify branches that would benefit from the use of llvm.expect based on the branch_weights

[llvm-branch-commits] [llvm] AMDGPU: Add a subtarget feature for fine-grained remote memory support (PR #96442)

2024-06-24 Thread Matt Arsenault via llvm-branch-commits
arsenm wrote: > need some tests This does nothing as it is. The real use patches have thousands of tests https://github.com/llvm/llvm-project/pull/96442 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org

[llvm-branch-commits] [llvm] AMDGPU: Add subtarget feature for global atomic fadd denormal support (PR #96443)

2024-06-24 Thread Stanislav Mekhanoshin via llvm-branch-commits
rampitec wrote: It is worse than that. It behaves differently depending on where atomic is executed. There is no single answer if this instruction supports denorms or not. https://github.com/llvm/llvm-project/pull/96443 ___ llvm-branch-commits

[llvm-branch-commits] [llvm] AMDGPU: Add subtarget feature for memory atomic fadd f64 (PR #96444)

2024-06-24 Thread Stanislav Mekhanoshin via llvm-branch-commits
rampitec wrote: Use it in a predicate when defining pseudos? https://github.com/llvm/llvm-project/pull/96444 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] AMDGPU: Add a subtarget feature for fine-grained remote memory support (PR #96442)

2024-06-24 Thread Yaxun Liu via llvm-branch-commits
yxsamliu wrote: need some tests https://github.com/llvm/llvm-project/pull/96442 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] AMDGPU: Add a subtarget feature for fine-grained remote memory support (PR #96442)

2024-06-24 Thread Matt Arsenault via llvm-branch-commits
arsenm wrote: No, the string description mentions this is for the non-PCIe supported cases https://github.com/llvm/llvm-project/pull/96442 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org

[llvm-branch-commits] [llvm][ProfDataUtils] provide getNumBranchWeights API (PR #90146)

2024-06-24 Thread Paul Kirth via llvm-branch-commits
https://github.com/ilovepi updated https://github.com/llvm/llvm-project/pull/90146 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm][ProfDataUtils] provide getNumBranchWeights API (PR #90146)

2024-06-24 Thread Paul Kirth via llvm-branch-commits
https://github.com/ilovepi updated https://github.com/llvm/llvm-project/pull/90146 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm][ProfDataUtils] provide getNumBranchWeights API (PR #90146)

2024-06-24 Thread Paul Kirth via llvm-branch-commits
https://github.com/ilovepi updated https://github.com/llvm/llvm-project/pull/90146 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm][ProfDataUtils] provide getNumBranchWeights API (PR #90146)

2024-06-24 Thread Paul Kirth via llvm-branch-commits
https://github.com/ilovepi updated https://github.com/llvm/llvm-project/pull/90146 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm][misexpect] Update MisExpect to use provenance tracking metadata (PR #86610)

2024-06-24 Thread Paul Kirth via llvm-branch-commits
https://github.com/ilovepi updated https://github.com/llvm/llvm-project/pull/86610 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm][misexpect] Update MisExpect to use provenance tracking metadata (PR #86610)

2024-06-24 Thread Paul Kirth via llvm-branch-commits
https://github.com/ilovepi updated https://github.com/llvm/llvm-project/pull/86610 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] AMDGPU: Add a subtarget feature for fine-grained remote memory support (PR #96442)

2024-06-24 Thread Yaxun Liu via llvm-branch-commits
yxsamliu wrote: If a sub target does not have this feature, does none of the atomic instructions work for fine-grained remote memory, including integer atomic add/xchg/cmpxchg? https://github.com/llvm/llvm-project/pull/96442 ___ llvm-branch-commits

[llvm-branch-commits] [compiler-rt] [TySan] Improved compatability for tests (PR #96507)

2024-06-24 Thread via llvm-branch-commits
https://github.com/gbMattN edited https://github.com/llvm/llvm-project/pull/96507 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [compiler-rt] [TySan] Improved compatability for tests (PR #96507)

2024-06-24 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-compiler-rt-sanitizer Author: None (gbMattN) Changes All the violation tests failed when running on my machine. By changing some check lines to regular expressions, we can account for file locality, and hardware specific type differences. There was

[llvm-branch-commits] [compiler-rt] [TySan] Improved compatability for tests (PR #96507)

2024-06-24 Thread via llvm-branch-commits
gbMattN wrote: @fhahn (Sorry for the ping, I can't manually add reviewers yet) https://github.com/llvm/llvm-project/pull/96507 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org

[llvm-branch-commits] [compiler-rt] [TySan] Improved compatability for tests (PR #96507)

2024-06-24 Thread via llvm-branch-commits
github-actions[bot] wrote: Thank you for submitting a Pull Request (PR) to the LLVM Project! This PR will be automatically labeled and the relevant teams will be notified. If you wish to, you can add reviewers by using the "Reviewers" section on this page. If this is not working for you,

[llvm-branch-commits] [compiler-rt] [TySan] Improved compatability for tests (PR #96507)

2024-06-24 Thread via llvm-branch-commits
https://github.com/gbMattN created https://github.com/llvm/llvm-project/pull/96507 All the violation tests failed when running on my machine. By changing some check lines to regular expressions, we can account for file locality, and hardware specific type differences. There was also an

[llvm-branch-commits] [llvm] AMDGPU: Add subtarget feature for memory atomic fadd f64 (PR #96444)

2024-06-24 Thread Matt Arsenault via llvm-branch-commits
https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/96444 >From 80c3f71f03d3b2ccbcd418d76d417f2a243fdbe4 Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Sun, 23 Jun 2024 17:07:53 +0200 Subject: [PATCH 1/2] AMDGPU: Add subtarget feature for memory atomic fadd f64

[llvm-branch-commits] [mlir] [mlir][linalg] Implement TilingInterface for winograd operators (PR #96184)

2024-06-24 Thread Oleksandr Alex Zinenko via llvm-branch-commits
@@ -2638,4 +2638,41 @@ def WinogradConv2DOp : Op { + let description = [{ +Decompose winograd operators. It will convert filter, input and output +transform operators into a combination of scf, tensor, and linalg ftynse wrote: Nit: operations

[llvm-branch-commits] [mlir] [mlir][linalg] Implement TilingInterface for winograd operators (PR #96184)

2024-06-24 Thread Oleksandr Alex Zinenko via llvm-branch-commits
@@ -2760,6 +2760,89 @@ LogicalResult WinogradFilterTransformOp::verify() { return success(); } +SmallVector +WinogradFilterTransformOp::getIterationDomain(OpBuilder ) { + Location loc = getLoc(); + Value zero = builder.create(loc, 0); + Value one = builder.create(loc,

[llvm-branch-commits] [mlir] [mlir][linalg] Implement TilingInterface for winograd operators (PR #96184)

2024-06-24 Thread Oleksandr Alex Zinenko via llvm-branch-commits
@@ -2760,6 +2760,89 @@ LogicalResult WinogradFilterTransformOp::verify() { return success(); } +SmallVector +WinogradFilterTransformOp::getIterationDomain(OpBuilder ) { + Location loc = getLoc(); + Value zero = builder.create(loc, 0); + Value one = builder.create(loc,

[llvm-branch-commits] [mlir] [mlir][linalg] Implement TilingInterface for winograd operators (PR #96184)

2024-06-24 Thread Oleksandr Alex Zinenko via llvm-branch-commits
@@ -2760,6 +2760,89 @@ LogicalResult WinogradFilterTransformOp::verify() { return success(); } +SmallVector +WinogradFilterTransformOp::getIterationDomain(OpBuilder ) { + Location loc = getLoc(); + Value zero = builder.create(loc, 0); + Value one = builder.create(loc,

[llvm-branch-commits] [mlir] [mlir][linalg] Implement TilingInterface for winograd operators (PR #96184)

2024-06-24 Thread Oleksandr Alex Zinenko via llvm-branch-commits
https://github.com/ftynse commented: I think @MaheshRavishankar should take a look at the interface implementation details. https://github.com/llvm/llvm-project/pull/96184 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org

[llvm-branch-commits] [mlir] [mlir][linalg] Implement TilingInterface for winograd operators (PR #96184)

2024-06-24 Thread Oleksandr Alex Zinenko via llvm-branch-commits
https://github.com/ftynse edited https://github.com/llvm/llvm-project/pull/96184 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [mlir] [mlir][linalg] Decompose winograd operators (PR #96183)

2024-06-24 Thread Oleksandr Alex Zinenko via llvm-branch-commits
@@ -36,6 +189,92 @@ constexpr TransformMapKeyTy F_2_3{2, 3}; constexpr TransformMapKeyTy F_4_3{4, 3}; constexpr TransformMapKeyTy F_2_5{2, 5}; +struct TransformMatrix { + TransformMatrix(const float *table, int64_t rows, int64_t cols, + int64_t scalarFactor

[llvm-branch-commits] [mlir] [mlir][linalg] Decompose winograd operators (PR #96183)

2024-06-24 Thread Oleksandr Alex Zinenko via llvm-branch-commits
@@ -100,6 +594,161 @@ Value matrixMultiply(RewriterBase , Location loc, return expandOutput; } +// This function transforms the output. The data layout of the output is HWNF. +// The transformation matrix is 2-dimension. We need to extract H x W from +// HWNF first. We need

[llvm-branch-commits] [mlir] [mlir][linalg] Decompose winograd operators (PR #96183)

2024-06-24 Thread Oleksandr Alex Zinenko via llvm-branch-commits
@@ -48,6 +287,261 @@ Value collapse2DData(RewriterBase , Location loc, Value data) { reassociation); } +// This function transforms the filter. The data layout of the filter is FHWC. +// The transformation matrix is

[llvm-branch-commits] [mlir] [mlir][linalg] Decompose winograd operators (PR #96183)

2024-06-24 Thread Oleksandr Alex Zinenko via llvm-branch-commits
@@ -289,6 +938,123 @@ FailureOr winogradConv2DHelper(RewriterBase , return transformedOutput.getDefiningOp(); } +FailureOr +decomposeWinogradFilterTransformHelper(RewriterBase , + linalg::WinogradFilterTransformOp op) { + Location loc

[llvm-branch-commits] [mlir] [mlir][linalg] Decompose winograd operators (PR #96183)

2024-06-24 Thread Oleksandr Alex Zinenko via llvm-branch-commits
@@ -48,6 +287,261 @@ Value collapse2DData(RewriterBase , Location loc, Value data) { reassociation); } +// This function transforms the filter. The data layout of the filter is FHWC. +// The transformation matrix is

[llvm-branch-commits] [mlir] [mlir][linalg] Decompose winograd operators (PR #96183)

2024-06-24 Thread Oleksandr Alex Zinenko via llvm-branch-commits
@@ -48,6 +287,261 @@ Value collapse2DData(RewriterBase , Location loc, Value data) { reassociation); } +// This function transforms the filter. The data layout of the filter is FHWC. +// The transformation matrix is

[llvm-branch-commits] [mlir] [mlir][linalg] Decompose winograd operators (PR #96183)

2024-06-24 Thread Oleksandr Alex Zinenko via llvm-branch-commits
@@ -323,5 +1089,12 @@ void populateWinogradConv2DPatterns(RewritePatternSet , int64_t m, patterns.insert(context, m, r); } +void populateDecomposeWinogradOpsPatterns(RewritePatternSet ) { + MLIRContext *context = patterns.getContext(); + patterns.insert(context); +

[llvm-branch-commits] [mlir] [mlir][linalg] Decompose winograd operators (PR #96183)

2024-06-24 Thread Oleksandr Alex Zinenko via llvm-branch-commits
@@ -100,6 +594,161 @@ Value matrixMultiply(RewriterBase , Location loc, return expandOutput; } +// This function transforms the output. The data layout of the output is HWNF. +// The transformation matrix is 2-dimension. We need to extract H x W from +// HWNF first. We need

[llvm-branch-commits] [mlir] [mlir][linalg] Decompose winograd operators (PR #96183)

2024-06-24 Thread Oleksandr Alex Zinenko via llvm-branch-commits
@@ -100,6 +594,161 @@ Value matrixMultiply(RewriterBase , Location loc, return expandOutput; } +// This function transforms the output. The data layout of the output is HWNF. +// The transformation matrix is 2-dimension. We need to extract H x W from +// HWNF first. We need

[llvm-branch-commits] [mlir] [mlir][linalg] Decompose winograd operators (PR #96183)

2024-06-24 Thread Oleksandr Alex Zinenko via llvm-branch-commits
@@ -48,6 +287,261 @@ Value collapse2DData(RewriterBase , Location loc, Value data) { reassociation); } +// This function transforms the filter. The data layout of the filter is FHWC. +// The transformation matrix is

[llvm-branch-commits] [mlir] [mlir][linalg] Decompose winograd operators (PR #96183)

2024-06-24 Thread Oleksandr Alex Zinenko via llvm-branch-commits
@@ -36,6 +189,92 @@ constexpr TransformMapKeyTy F_2_3{2, 3}; constexpr TransformMapKeyTy F_4_3{4, 3}; constexpr TransformMapKeyTy F_2_5{2, 5}; +struct TransformMatrix { ftynse wrote: Please document top-level entities.

[llvm-branch-commits] [mlir] [mlir][linalg] Decompose winograd operators (PR #96183)

2024-06-24 Thread Oleksandr Alex Zinenko via llvm-branch-commits
@@ -23,6 +26,156 @@ namespace linalg { namespace { +// clang-format off +// Winograd Conv2D uses a minimal 2D filtering algorithm to calculate its +// result. The formula of minimal 2D filtering algorithm F(m x m, r x r), +// m is the output dimension and r is the filter

[llvm-branch-commits] [llvm] AMDGPU: Add subtarget feature for global atomic fadd denormal support (PR #96443)

2024-06-24 Thread Matt Arsenault via llvm-branch-commits
https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/96443 >From f99d34b66486a17e2fe70d372d67fbabde82d5fb Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Sun, 23 Jun 2024 16:44:08 +0200 Subject: [PATCH 1/2] AMDGPU: Add subtarget feature for global atomic fadd

[llvm-branch-commits] [llvm] AMDGPU: Add a subtarget feature for fine-grained remote memory support (PR #96442)

2024-06-24 Thread Matt Arsenault via llvm-branch-commits
arsenm wrote: > Actually not, we do not know the bus. Moreover, we know this is opposite. On gfx940/gfx12, we don't need to know the bus to handle the agent scope case correctly. The instructions still function, just always at device scope. We do need to know the bus and/or location to handle

[llvm-branch-commits] [llvm] [AMDGPU][SILoadStoreOptimizer] Merge constrained sloads (PR #96162)

2024-06-24 Thread Stanislav Mekhanoshin via llvm-branch-commits
@@ -1701,17 +1732,33 @@ unsigned SILoadStoreOptimizer::getNewOpcode(const CombineInfo , return AMDGPU::S_BUFFER_LOAD_DWORDX8_SGPR_IMM; } case S_LOAD_IMM: -switch (Width) { -default: - return 0; -case 2: - return AMDGPU::S_LOAD_DWORDX2_IMM; -

[llvm-branch-commits] [llvm] AMDGPU: Add a subtarget feature for fine-grained remote memory support (PR #96442)

2024-06-24 Thread Stanislav Mekhanoshin via llvm-branch-commits
rampitec wrote: > We do statically know for some of the targets (mostly gfx12 and gfx940) that > it's supposed to work. This is the "scope downgrade" vs. "nop" cases in the > atomic support table Actually not, we do not know the bus. Moreover, we know this is opposite.

[llvm-branch-commits] [llvm] [AMDGPU][SILoadStoreOptimizer] Merge constrained sloads (PR #96162)

2024-06-24 Thread Christudasan Devadasan via llvm-branch-commits
@@ -1701,17 +1732,33 @@ unsigned SILoadStoreOptimizer::getNewOpcode(const CombineInfo , return AMDGPU::S_BUFFER_LOAD_DWORDX8_SGPR_IMM; } case S_LOAD_IMM: -switch (Width) { -default: - return 0; -case 2: - return AMDGPU::S_LOAD_DWORDX2_IMM; -

[llvm-branch-commits] [llvm] [AMDGPU][SILoadStoreOptimizer] Merge constrained sloads (PR #96162)

2024-06-24 Thread Jay Foad via llvm-branch-commits
https://github.com/jayfoad edited https://github.com/llvm/llvm-project/pull/96162 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [AMDGPU][SILoadStoreOptimizer] Merge constrained sloads (PR #96162)

2024-06-24 Thread Jay Foad via llvm-branch-commits
@@ -1701,17 +1732,33 @@ unsigned SILoadStoreOptimizer::getNewOpcode(const CombineInfo , return AMDGPU::S_BUFFER_LOAD_DWORDX8_SGPR_IMM; } case S_LOAD_IMM: -switch (Width) { -default: - return 0; -case 2: - return AMDGPU::S_LOAD_DWORDX2_IMM; -

[llvm-branch-commits] [llvm] [AMDGPU] Codegen support for constrained multi-dword sloads (PR #96163)

2024-06-24 Thread Jay Foad via llvm-branch-commits
@@ -867,13 +867,104 @@ def SMRDBufferImm : ComplexPattern; def SMRDBufferImm32 : ComplexPattern; def SMRDBufferSgprImm : ComplexPattern; +class SMRDAlignedLoadPat : PatFrag <(ops node:$ptr), (Op node:$ptr), [{ + // Returns true if it is a naturally aligned multi-dword