[llvm-branch-commits] [llvm] [mlir] [flang][OpenMP] Support multi-block reduction combiner regions on the GPU (PR #156837)

2025-09-16 Thread Kareem Ergawy via llvm-branch-commits
https://github.com/ergawy updated https://github.com/llvm/llvm-project/pull/156837 >From c5dde7cbcece549d0996a6671d1ae1b53b9cd63b Mon Sep 17 00:00:00 2001 From: ergawy Date: Thu, 4 Sep 2025 01:06:21 -0500 Subject: [PATCH 1/3] [flang][OpenMP] Support multi-block reduction combiner regions on t

[llvm-branch-commits] [flang] [flang][OpenMP] `do concurrent`: support `reduce` on device (PR #156610)

2025-09-16 Thread Kareem Ergawy via llvm-branch-commits
https://github.com/ergawy updated https://github.com/llvm/llvm-project/pull/156610 >From bdd9ab29d7c0c57edc5b8848c7e4be5626b5f57e Mon Sep 17 00:00:00 2001 From: ergawy Date: Tue, 2 Sep 2025 08:36:34 -0500 Subject: [PATCH] [flang][OpenMP] `do concurrent`: support `reduce` on device Extends `do

[llvm-branch-commits] [llvm] AMDGPU: Ensure both wavesize features are not set (PR #159234)

2025-09-16 Thread Matt Arsenault via llvm-branch-commits
https://github.com/arsenm ready_for_review https://github.com/llvm/llvm-project/pull/159234 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] AMDGPU: Ensure both wavesize features are not set (PR #159234)

2025-09-16 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-backend-amdgpu Author: Matt Arsenault (arsenm) Changes Make sure we cannot be in a mode with both wavesizes. This prevents assertions in a future change. This should probably just be an error, but we do not have a good way to report errors from the MCSub

[llvm-branch-commits] [llvm] AMDGPU: Ensure both wavesize features are not set (PR #159234)

2025-09-16 Thread Matt Arsenault via llvm-branch-commits
https://github.com/arsenm edited https://github.com/llvm/llvm-project/pull/159234 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] AMDGPU: Ensure both wavesize features are not set (PR #159234)

2025-09-16 Thread Matt Arsenault via llvm-branch-commits
arsenm wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/159234?utm_source=stack-comment-downstack-mergeability-warning";

[llvm-branch-commits] [llvm] AMDGPU: Ensure both wavesize features are not set (PR #159234)

2025-09-16 Thread Matt Arsenault via llvm-branch-commits
https://github.com/arsenm created https://github.com/llvm/llvm-project/pull/159234 AMDGPU: Ensure both wavesize features are not set Make sure we cannot be in a mode with both wavesizes. This prevents assertions in a future change. This should probably just be an error, but we do not have a goo

[llvm-branch-commits] [llvm] [mlir] [flang][OpenMP] Support multi-block reduction combiner regions on the GPU (PR #156837)

2025-09-16 Thread Abid Qadeer via llvm-branch-commits
https://github.com/abidh approved this pull request. LGTM. https://github.com/llvm/llvm-project/pull/156837 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [DA] Add test where ExactSIV misses dependency due to overflow (NFC) (PR #157085)

2025-09-16 Thread Ryotaro Kasuga via llvm-branch-commits
https://github.com/kasuga-fj updated https://github.com/llvm/llvm-project/pull/157085 >From 4e43533b48aa613b05fb0753ac290809da8f28d1 Mon Sep 17 00:00:00 2001 From: Ryotaro Kasuga Date: Fri, 5 Sep 2025 11:32:54 + Subject: [PATCH 1/2] [DA] Add test where ExactSIV misses dependency due to ove

[llvm-branch-commits] [clang] port 5b4819e to release (PR #159209)

2025-09-16 Thread David Blaikie via llvm-branch-commits
https://github.com/dwblaikie ready_for_review https://github.com/llvm/llvm-project/pull/159209 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [clang] port 5b4819e to release (PR #159209)

2025-09-16 Thread David Blaikie via llvm-branch-commits
https://github.com/dwblaikie edited https://github.com/llvm/llvm-project/pull/159209 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [clang] port 5b4819e to release (PR #159209)

2025-09-16 Thread David Blaikie via llvm-branch-commits
https://github.com/dwblaikie edited https://github.com/llvm/llvm-project/pull/159209 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [IR2Vec] Refactor vocabulary to use section-based storage (PR #158376)

2025-09-16 Thread S. VenkataKeerthy via llvm-branch-commits
https://github.com/svkeerthy updated https://github.com/llvm/llvm-project/pull/158376 >From 763b16710251eb055b0b192051069cbc838dd7d4 Mon Sep 17 00:00:00 2001 From: svkeerthy Date: Fri, 12 Sep 2025 22:06:44 + Subject: [PATCH] VocabStorage --- llvm/include/llvm/Analysis/IR2Vec.h |

[llvm-branch-commits] [llvm] [DA] Add test where ExactSIV misses dependency due to overflow (NFC) (PR #157085)

2025-09-16 Thread Ryotaro Kasuga via llvm-branch-commits
https://github.com/kasuga-fj updated https://github.com/llvm/llvm-project/pull/157085 >From 4e43533b48aa613b05fb0753ac290809da8f28d1 Mon Sep 17 00:00:00 2001 From: Ryotaro Kasuga Date: Fri, 5 Sep 2025 11:32:54 + Subject: [PATCH 1/2] [DA] Add test where ExactSIV misses dependency due to ove

[llvm-branch-commits] [llvm] [DA] Add overflow check in ExactSIV (PR #157086)

2025-09-16 Thread Ryotaro Kasuga via llvm-branch-commits
https://github.com/kasuga-fj updated https://github.com/llvm/llvm-project/pull/157086 >From 9f8794a071e152cf128dc03d9994c884fecf5d12 Mon Sep 17 00:00:00 2001 From: Ryotaro Kasuga Date: Fri, 5 Sep 2025 11:41:29 + Subject: [PATCH 1/2] [DA] Add overflow check in ExactSIV --- llvm/lib/Analysi

[llvm-branch-commits] [llvm] [DA] Add test where WeakCrossingSIV misses dependency due to overflow (NFC) (PR #158281)

2025-09-16 Thread Ryotaro Kasuga via llvm-branch-commits
https://github.com/kasuga-fj updated https://github.com/llvm/llvm-project/pull/158281 >From a42c8002548c97d6c7755b1db821a5c682881efe Mon Sep 17 00:00:00 2001 From: Ryotaro Kasuga Date: Fri, 12 Sep 2025 11:06:39 + Subject: [PATCH] [DA] Add test where WeakCrossingSIV misses dependency due to

[llvm-branch-commits] [llvm] [LoopUnroll] Fix block frequencies for epilogue (PR #159163)

2025-09-16 Thread Joel E. Denny via llvm-branch-commits
https://github.com/jdenny-ornl updated https://github.com/llvm/llvm-project/pull/159163 >From 5a9959313c0aebc1c707d19e30055cb925be7760 Mon Sep 17 00:00:00 2001 From: "Joel E. Denny" Date: Tue, 16 Sep 2025 16:03:11 -0400 Subject: [PATCH 1/2] [LoopUnroll] Fix block frequencies for epilogue As an

[llvm-branch-commits] [CodeGen][CFI] Generalize transparent union in args of args of functions (PR #158194)

2025-09-16 Thread Vitaly Buka via llvm-branch-commits
https://github.com/vitalybuka converted_to_draft https://github.com/llvm/llvm-project/pull/158194 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [LoopUnroll] Fix block frequencies when no runtime (PR #157754)

2025-09-16 Thread Joel E. Denny via llvm-branch-commits
https://github.com/jdenny-ornl updated https://github.com/llvm/llvm-project/pull/157754 >From 75a8df62df2ef7e8c02d7a76120e57e2dd1a1539 Mon Sep 17 00:00:00 2001 From: "Joel E. Denny" Date: Tue, 9 Sep 2025 17:33:38 -0400 Subject: [PATCH 1/2] [LoopUnroll] Fix block frequencies when no runtime Thi

[llvm-branch-commits] [llvm] c5b5583 - Revert "[NFCI][Globals] In GlobalObjects::setSectionPrefix, do conditional up…"

2025-09-16 Thread via llvm-branch-commits
Author: Mingming Liu Date: 2025-09-16T12:51:22-07:00 New Revision: c5b558385b956faf99348b3f0de91926061afcfb URL: https://github.com/llvm/llvm-project/commit/c5b558385b956faf99348b3f0de91926061afcfb DIFF: https://github.com/llvm/llvm-project/commit/c5b558385b956faf99348b3f0de91926061afcfb.diff

[llvm-branch-commits] [clang] [HLSL] Use static create methods to initialize resources in arrays (PR #157005)

2025-09-16 Thread Chris B via llvm-branch-commits
https://github.com/llvm-beanz approved this pull request. https://github.com/llvm/llvm-project/pull/157005 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [DA] Add overflow check in ExactSIV (PR #157086)

2025-09-16 Thread Ryotaro Kasuga via llvm-branch-commits
@@ -815,8 +815,8 @@ for.end: ; preds = %for.body ;; A[3*i - 2] = 1; ;; } ;; -;; FIXME: DependencyAnalsysis currently detects no dependency between -;; `A[-6*i + INT64_MAX]` and `A[3*i - 2]`, but it does exist. For example, +;; There

[llvm-branch-commits] [llvm] [DA] Add test where WeakCrossingSIV misses dependency due to overflow (NFC) (PR #158281)

2025-09-16 Thread Ryotaro Kasuga via llvm-branch-commits
https://github.com/kasuga-fj edited https://github.com/llvm/llvm-project/pull/158281 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [IR2Vec] Refactor vocabulary to use section-based storage (PR #158376)

2025-09-16 Thread S. VenkataKeerthy via llvm-branch-commits
@@ -144,6 +145,73 @@ struct Embedding { using InstEmbeddingsMap = DenseMap; using BBEmbeddingsMap = DenseMap; +/// Generic storage class for section-based vocabularies. +/// VocabStorage provides a generic foundation for storing and accessing +/// embeddings organized into sec

[llvm-branch-commits] [clang] release/21.x: [RISCV] Reduce RISCV code generation build time (PR #158164)

2025-09-16 Thread Saleem Abdulrasool via llvm-branch-commits
compnerd wrote: > I do not know what this error means or how to fix it: > > ``` > error: Expected version 21.1.2 but found version 21.1.1 > ``` This just needs to be updated in CMakeLists.txt https://github.com/llvm/llvm-project/pull/158164 ___ llvm-

[llvm-branch-commits] [Remarks] Restructure bitstream remarks to be fully standalone (PR #156715)

2025-09-16 Thread Tobias Stadler via llvm-branch-commits
https://github.com/tobias-stadler edited https://github.com/llvm/llvm-project/pull/156715 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [NFC][CodeGe][CFI] Pre-commit transparent_union tests (PR #158192)

2025-09-16 Thread Vitaly Buka via llvm-branch-commits
https://github.com/vitalybuka edited https://github.com/llvm/llvm-project/pull/158192 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] PPC: Replace PointerLikeRegClass with RegClassByHwMode (PR #158777)

2025-09-16 Thread Sergei Barannikov via llvm-branch-commits
@@ -868,10 +868,16 @@ def crbitm: Operand { def PPCRegGxRCNoR0Operand : AsmOperandClass { let Name = "RegGxRCNoR0"; let PredicateMethod = "isRegNumber"; } -def ptr_rc_nor0 : Operand, PointerLikeRegClass<1> { + +def ptr_rc_nor0 : RegClassByHwMode< + [PPC32, PPC64], + [GPRC_N

[llvm-branch-commits] [Remarks] Restructure bitstream remarks to be fully standalone (PR #156715)

2025-09-16 Thread Jon Roelofs via llvm-branch-commits
jroelofs wrote: likewise. I’ll leave this “unresolved” so it doesn’t get hidden https://github.com/llvm/llvm-project/pull/156715 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.ll

[llvm-branch-commits] [Remarks] Restructure bitstream remarks to be fully standalone (PR #156715)

2025-09-16 Thread Florian Hahn via llvm-branch-commits
fhahn wrote: Sounds good to me! https://github.com/llvm/llvm-project/pull/156715 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-comm

[llvm-branch-commits] [llvm] c4a5c58 - Revert "AMDGPU/GlobalISel: Import D16 load patterns and add combines for them…"

2025-09-16 Thread via llvm-branch-commits
Author: Petar Avramovic Date: 2025-09-11T12:48:18+02:00 New Revision: c4a5c5809defb97fd1b757694d71bb7aa0978544 URL: https://github.com/llvm/llvm-project/commit/c4a5c5809defb97fd1b757694d71bb7aa0978544 DIFF: https://github.com/llvm/llvm-project/commit/c4a5c5809defb97fd1b757694d71bb7aa0978544.dif

[llvm-branch-commits] [llvm] PPC: Replace PointerLikeRegClass with RegClassByHwMode (PR #158777)

2025-09-16 Thread Sergei Barannikov via llvm-branch-commits
@@ -902,7 +908,9 @@ def memri34_pcrel : Operand { // memri, imm is a 34-bit value. def PPCRegGxRCOperand : AsmOperandClass { let Name = "RegGxRC"; let PredicateMethod = "isRegNumber"; } -def ptr_rc_idx : Operand, PointerLikeRegClass<0> { +def ptr_rc_idx : Operand, --

[llvm-branch-commits] [Remarks] Restructure bitstream remarks to be fully standalone (PR #156715)

2025-09-16 Thread Tobias Stadler via llvm-branch-commits
tobias-stadler wrote: Until we figure out a better testing methodology for dsymutil, I'd like to land this with the blob tests to unblock further work on the remarks infra. https://github.com/llvm/llvm-project/pull/156715 __

[llvm-branch-commits] [Remarks] Restructure bitstream remarks to be fully standalone (PR #156715)

2025-09-16 Thread Tobias Stadler via llvm-branch-commits
tobias-stadler wrote: It would be good to change the testing methodology here. Currently all the dsymutil tests are blobs. We should be able to get remarks and .o files from llc. However, we need to link the .o files into a binary. Do you know of a way to do

[llvm-branch-commits] [llvm] [DA] Add test where ExactSIV misses dependency due to overflow (NFC) (PR #157085)

2025-09-16 Thread Ryotaro Kasuga via llvm-branch-commits
@@ -807,3 +807,123 @@ for.body: ; preds = %entry, %for.body for.end: ; preds = %for.body ret void } + +;; max_i = INT64_MAX/6 // 1537228672809129301 +;; for (long long i = 0; i <= max_i; i++) {

[llvm-branch-commits] [llvm] [mlir] [flang][OpenMP] Support multi-block reduction combiner regions on the GPU (PR #156837)

2025-09-16 Thread Kareem Ergawy via llvm-branch-commits
ergawy wrote: > Thanks for handling my comments. It looks good to me but I have one question. > This patch sets the insertion point so that store instruction gets generated > at the correct place. But the test does not check for any store instruction. > I was just wondering if the test is chec

[llvm-branch-commits] [llvm] AMDGPU: Stop using aligned VGPR classes for addRegisterClass (PR #158278)

2025-09-16 Thread Matt Arsenault via llvm-branch-commits
https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/158278 >From f6208fe1d18e2406ca9b6e84adbb35051b6ce94d Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Fri, 12 Sep 2025 20:45:56 +0900 Subject: [PATCH] AMDGPU: Stop using aligned VGPR classes for addRegisterClass Th

[llvm-branch-commits] [llvm] AMDGPU: Stop using aligned VGPR classes for addRegisterClass (PR #158278)

2025-09-16 Thread Matt Arsenault via llvm-branch-commits
https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/158278 >From f6208fe1d18e2406ca9b6e84adbb35051b6ce94d Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Fri, 12 Sep 2025 20:45:56 +0900 Subject: [PATCH] AMDGPU: Stop using aligned VGPR classes for addRegisterClass Th

[llvm-branch-commits] [flang] [mlir] [MLIR] Add new complex.powi op (PR #158722)

2025-09-16 Thread Tom Eccles via llvm-branch-commits
https://github.com/tblah commented: LGTM once the existing comments are addressed. https://github.com/llvm/llvm-project/pull/158722 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/

[llvm-branch-commits] [llvm] release/21.x: [Loads] Check for overflow when adding MaxPtrDiff + Offset. (PR #158918)

2025-09-16 Thread Nikita Popov via llvm-branch-commits
https://github.com/nikic approved this pull request. LGTM https://github.com/llvm/llvm-project/pull/158918 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [mlir] [flang][OpenMP] Support multi-block reduction combiner regions on the GPU (PR #156837)

2025-09-16 Thread Abid Qadeer via llvm-branch-commits
abidh wrote: Thanks for handling my comments. It looks good to me but I have one question. This patch sets the insertion point so that store instruction gets generated at the correct place. But the test does not have any store instruction. I was just wondering if the test is checking the right

[llvm-branch-commits] [llvm] release/21.x: [Loads] Check for overflow when adding MaxPtrDiff + Offset. (PR #158918)

2025-09-16 Thread Florian Hahn via llvm-branch-commits
fhahn wrote: This fixes a mis-compile when bootstrapping Clang with sanitizers on macOS https://github.com/llvm/llvm-project/pull/158918 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/list

[llvm-branch-commits] [llvm] release/21.x: [Loads] Check for overflow when adding MaxPtrDiff + Offset. (PR #158918)

2025-09-16 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-llvm-analysis Author: Florian Hahn (fhahn) Changes MaxPtrDiff + Offset may wrap, leading to incorrect results. Use uadd_ov to check for overflow. (cherry picked from commit cf444ac2adc45c1079856087b8ba9a04466f78db) --- Full diff: https://github.com/ll

[llvm-branch-commits] [llvm] release/21.x: [Loads] Check for overflow when adding MaxPtrDiff + Offset. (PR #158918)

2025-09-16 Thread Florian Hahn via llvm-branch-commits
https://github.com/fhahn milestoned https://github.com/llvm/llvm-project/pull/158918 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] release/21.x: [Loads] Check for overflow when adding MaxPtrDiff + Offset. (PR #158918)

2025-09-16 Thread Florian Hahn via llvm-branch-commits
https://github.com/fhahn created https://github.com/llvm/llvm-project/pull/158918 MaxPtrDiff + Offset may wrap, leading to incorrect results. Use uadd_ov to check for overflow. (cherry picked from commit cf444ac2adc45c1079856087b8ba9a04466f78db) >From 89c5e7e99f08f6f79aafa2ab91b0e224194f95b6

[llvm-branch-commits] [llvm] [mlir] [flang][OpenMP] Support multi-block reduction combiner regions on the GPU (PR #156837)

2025-09-16 Thread Kareem Ergawy via llvm-branch-commits
https://github.com/ergawy updated https://github.com/llvm/llvm-project/pull/156837 >From ccf3696848367835c15e973c7a7b0d76297be31c Mon Sep 17 00:00:00 2001 From: ergawy Date: Thu, 4 Sep 2025 01:06:21 -0500 Subject: [PATCH 1/2] [flang][OpenMP] Support multi-block reduction combiner regions on t

[llvm-branch-commits] [flang] [flang][OpenMP] `do concurrent`: support `reduce` on device (PR #156610)

2025-09-16 Thread Kareem Ergawy via llvm-branch-commits
https://github.com/ergawy updated https://github.com/llvm/llvm-project/pull/156610 >From 5b9f17606b95f689a7ffb0187d103b2a4bd62e24 Mon Sep 17 00:00:00 2001 From: ergawy Date: Tue, 2 Sep 2025 08:36:34 -0500 Subject: [PATCH] [flang][OpenMP] `do concurrent`: support `reduce` on device Extends `do

[llvm-branch-commits] [flang] [flang][OpenMP] `do concurrent`: support `local` on device (PR #157638)

2025-09-16 Thread Kareem Ergawy via llvm-branch-commits
https://github.com/ergawy updated https://github.com/llvm/llvm-project/pull/157638 >From 509959568c433d7745ca1f5387edd7654b3e1c2a Mon Sep 17 00:00:00 2001 From: ergawy Date: Tue, 2 Sep 2025 05:54:00 -0500 Subject: [PATCH] [flang][OpenMP] `do concurrent`: support `local` on device Extends suppo

[llvm-branch-commits] [llvm] [AMDGPU] Add aperture classes to VS_64 (PR #158823)

2025-09-16 Thread Matt Arsenault via llvm-branch-commits
https://github.com/arsenm approved this pull request. https://github.com/llvm/llvm-project/pull/158823 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [AMDGPU] Add aperture classes to VS_64 (PR #158823)

2025-09-16 Thread Stanislav Mekhanoshin via llvm-branch-commits
https://github.com/rampitec ready_for_review https://github.com/llvm/llvm-project/pull/158823 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [AMDGPU] Add aperture classes to VS_64 (PR #158823)

2025-09-16 Thread Matt Arsenault via llvm-branch-commits
https://github.com/arsenm commented: This does probably add inline asm support for this usage https://github.com/llvm/llvm-project/pull/158823 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailm

[llvm-branch-commits] [llvm] [AMDGPU] Add aperture classes to VS_64 (PR #158823)

2025-09-16 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-llvm-globalisel @llvm/pr-subscribers-backend-amdgpu Author: Stanislav Mekhanoshin (rampitec) Changes Should not do anything. --- Patch is 85.72 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/158823.diff 10

[llvm-branch-commits] [llvm] [AMDGPU] Add aperture classes to VS_64 (PR #158823)

2025-09-16 Thread Stanislav Mekhanoshin via llvm-branch-commits
rampitec wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/158823?utm_source=stack-comment-downstack-mergeability-warning"

[llvm-branch-commits] [llvm] [AMDGPU] Add aperture classes to VS_64 (PR #158823)

2025-09-16 Thread Stanislav Mekhanoshin via llvm-branch-commits
https://github.com/rampitec created https://github.com/llvm/llvm-project/pull/158823 Should not do anything. >From 2e363048d0f6ec969e6824bdaa062fee3907d853 Mon Sep 17 00:00:00 2001 From: Stanislav Mekhanoshin Date: Tue, 16 Sep 2025 00:28:29 -0700 Subject: [PATCH] [AMDGPU] Add aperture classes

[llvm-branch-commits] [llvm] PPC: Replace PointerLikeRegClass with RegClassByHwMode (PR #158777)

2025-09-16 Thread Matt Arsenault via llvm-branch-commits
https://github.com/arsenm ready_for_review https://github.com/llvm/llvm-project/pull/158777 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] PPC: Replace PointerLikeRegClass with RegClassByHwMode (PR #158777)

2025-09-16 Thread Matt Arsenault via llvm-branch-commits
https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/158777 >From 0821bf6b56fbcf9aebc2eea8b4e1af02f9f2d1f9 Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Fri, 5 Sep 2025 18:03:59 +0900 Subject: [PATCH 1/2] PPC: Replace PointerLikeRegClass with RegClassByHwMode ---

[llvm-branch-commits] [clang] [PAC][Driver] Support ptrauth flags only on ARM64 Darwin or with pauthtest ABI (PR #113152)

2025-09-16 Thread Daniil Kovalev via llvm-branch-commits
https://github.com/kovdan01 updated https://github.com/llvm/llvm-project/pull/113152 >From 64489c9dd71e9ff5b0b05130e73b8e7d2ba1fde7 Mon Sep 17 00:00:00 2001 From: Daniil Kovalev Date: Mon, 21 Oct 2024 12:18:56 +0300 Subject: [PATCH 1/8] [PAC][Driver] Support ptrauth flags only on ARM64 Darwin

[llvm-branch-commits] [llvm] [AMDGPU] Fix codegen to emit COPY instead of S_MOV_B64 for aperture regs (PR #158754)

2025-09-16 Thread Jay Foad via llvm-branch-commits
https://github.com/jayfoad approved this pull request. LGTM https://github.com/llvm/llvm-project/pull/158754 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits