[llvm-branch-commits] [llvm] AMDGPU: Add baseline test for unspilling VGPRs after MFMA rewrite (PR #154322)

https://github.com/srpande approved this pull request. https://github.com/llvm/llvm-project/pull/154322 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] AMDGPU: Handle rewriting non-tied MFMA to AGPR form (PR #149027)

https://github.com/srpande commented: I have a general question about this. What if we write to agpr form form on vgprcd, where C Opc is AGPR and dest is vgpr? If I read this code, this code freely does that. Is that correct? https://github.com/llvm/llvm-project/pull/149027 ___

[llvm-branch-commits] [llvm] AMDGPU: Add a few missing mfma rewrite tests (PR #149026)

https://github.com/srpande approved this pull request. https://github.com/llvm/llvm-project/pull/149026 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] AMDGPU: Add codegen support for gfx950 v_ashr_pk_i8/u8_i32 (PR #118304)

https://github.com/srpande approved this pull request. LGTM for now. I will add the support in instcombine later. https://github.com/llvm/llvm-project/pull/118304 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.ll

[llvm-branch-commits] [clang] [llvm] AMDGPU: Add v_smfmac_i32_32x32x64_i8 for gfx950 (PR #117214)

https://github.com/srpande approved this pull request. lgrm https://github.com/llvm/llvm-project/pull/117214 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits