koachan wrote:
Okay, new PR is at https://github.com/llvm/llvm-project/pull/78280.
https://github.com/llvm/llvm-project/pull/77196
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s-barannikov wrote:
Yes, sure
https://github.com/llvm/llvm-project/pull/77196
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koachan wrote:
Uh oh, seems like I couldn't merge it with the tool either...
Guess I'll open a new PR to merge this, would that be okay? @brad0
@s-barannikov
https://github.com/llvm/llvm-project/pull/77196
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koachan wrote:
Lemme see if I can do it
I used `spr` to make the PRs, it should still be mergeable from there, I think?
https://github.com/llvm/llvm-project/pull/77196
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brad0 wrote:
I intentionally restored the branch as I only noticed after the merge that the
target branch was set incorrectly. It wasn't merged into the LLVM repo.
https://github.com/llvm/llvm-project/pull/77196
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ll
https://github.com/brad0 closed https://github.com/llvm/llvm-project/pull/77196
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https://github.com/s-barannikov approved this pull request.
https://github.com/llvm/llvm-project/pull/77196
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@@ -0,0 +1,51 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -relocation-model=pic -mtriple=sparc | FileCheck
--check-prefix=SPARC %s
+; RUN: llc < %s -relocation-model=pic -mtriple=sparcv9 | FileCheck
--check-prefix=SPARC64 %s
https://github.com/koachan updated
https://github.com/llvm/llvm-project/pull/77196
>From f4830825ebea96f71fb1b9d1f1192114291b093c Mon Sep 17 00:00:00 2001
From: Koakuma
Date: Sun, 14 Jan 2024 10:35:24 +0700
Subject: [PATCH] Add nounwind to test cases
Created using spr 1.3.4
---
llvm/test/Code
@@ -234,8 +244,15 @@ void SparcAsmPrinter::LowerGETPCXAndEmitMCInsts(const
MachineInstr *MI,
// add , %o7,
OutStreamer->emitLabel(StartLabel);
- MCOperand Callee = createPCXCallOP(EndLabel, OutContext);
- EmitCall(*OutStreamer, Callee, STI);
+ if (!STI.getTargetTri
https://github.com/s-barannikov edited
https://github.com/llvm/llvm-project/pull/77196
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@@ -0,0 +1,59 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -relocation-model=pic -mtriple=sparc | FileCheck
--check-prefix=SPARC %s
+; RUN: llc < %s -relocation-model=pic -mtriple=sparcv9 | FileCheck
--check-prefix=SPARC64 %s
@@ -118,9 +126,11 @@ def : Proc<"ma2480", [FeatureLeon, LeonCASA]>;
def : Proc<"ma2485", [FeatureLeon, LeonCASA]>;
def : Proc<"ma2x8x", [FeatureLeon, LeonCASA]>;
def : Proc<"v9", [FeatureV9]>;
-def : Proc<"ultrasparc", [FeatureV9, Fe
@@ -234,8 +244,15 @@ void SparcAsmPrinter::LowerGETPCXAndEmitMCInsts(const
MachineInstr *MI,
// add , %o7,
OutStreamer->emitLabel(StartLabel);
- MCOperand Callee = createPCXCallOP(EndLabel, OutContext);
- EmitCall(*OutStreamer, Callee, STI);
+ if (!STI.getTargetTri
@@ -234,8 +244,15 @@ void SparcAsmPrinter::LowerGETPCXAndEmitMCInsts(const
MachineInstr *MI,
// add , %o7,
s-barannikov wrote:
Please update the comment to include the rdpc case.
https://github.com/llvm/llvm-project/pull/77196
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llvmbot wrote:
@llvm/pr-subscribers-backend-sparc
Author: Koakuma (koachan)
Changes
On 64-bit target, prefer usng RDPC over CALL to get the value of %pc.
This is faster on modern processors (Niagara T1 and newer) and avoids polluting
the processor's predictor state.
The old behavior of us
https://github.com/koachan created
https://github.com/llvm/llvm-project/pull/77196
On 64-bit target, prefer usng RDPC over CALL to get the value of %pc.
This is faster on modern processors (Niagara T1 and newer) and avoids polluting
the processor's predictor state.
The old behavior of using a f
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