Author: Stephan Herhut
Date: 2021-01-11T14:27:28+01:00
New Revision: 2e17d9c0ee7a0ba2aff7dd449005e4d0fd10fe57

URL: 
https://github.com/llvm/llvm-project/commit/2e17d9c0ee7a0ba2aff7dd449005e4d0fd10fe57
DIFF: 
https://github.com/llvm/llvm-project/commit/2e17d9c0ee7a0ba2aff7dd449005e4d0fd10fe57.diff

LOG: [ARM] Add uses for locals introduced for debug messages. NFC.

This adds uses for locals introduced for new debug messages for the load store 
optimizer. Those locals are only used on debug statements and otherwise create 
unused variable warnings.

Differential Revision: https://reviews.llvm.org/D94398

Added: 
    

Modified: 
    llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp 
b/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
index 5144cf953e99..aa1fe4e4ffda 100644
--- a/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
+++ b/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
@@ -1511,6 +1511,7 @@ bool 
ARMLoadStoreOpt::MergeBaseUpdateLoadStore(MachineInstr *MI) {
                    .addReg(MO.getReg(), (isLd ? getDefRegState(true)
                                               : getKillRegState(MO.isKill())))
                    .cloneMemRefs(*MI);
+    (void)MIB;
     LLVM_DEBUG(dbgs() << "  Added new instruction: " << *MIB);
   } else if (isLd) {
     if (isAM2) {
@@ -1524,6 +1525,7 @@ bool 
ARMLoadStoreOpt::MergeBaseUpdateLoadStore(MachineInstr *MI) {
                 .addImm(Pred)
                 .addReg(PredReg)
                 .cloneMemRefs(*MI);
+        (void)MIB;
         LLVM_DEBUG(dbgs() << "  Added new instruction: " << *MIB);
       } else {
         int Imm = ARM_AM::getAM2Opc(AddSub, Bytes, ARM_AM::no_shift);
@@ -1535,6 +1537,7 @@ bool 
ARMLoadStoreOpt::MergeBaseUpdateLoadStore(MachineInstr *MI) {
                 .addImm(Imm)
                 .add(predOps(Pred, PredReg))
                 .cloneMemRefs(*MI);
+        (void)MIB;
         LLVM_DEBUG(dbgs() << "  Added new instruction: " << *MIB);
       }
     } else {
@@ -1546,6 +1549,7 @@ bool 
ARMLoadStoreOpt::MergeBaseUpdateLoadStore(MachineInstr *MI) {
               .addImm(Offset)
               .add(predOps(Pred, PredReg))
               .cloneMemRefs(*MI);
+      (void)MIB;
       LLVM_DEBUG(dbgs() << "  Added new instruction: " << *MIB);
     }
   } else {
@@ -1563,6 +1567,7 @@ bool 
ARMLoadStoreOpt::MergeBaseUpdateLoadStore(MachineInstr *MI) {
                      .addImm(Imm)
                      .add(predOps(Pred, PredReg))
                      .cloneMemRefs(*MI);
+      (void)MIB;
       LLVM_DEBUG(dbgs() << "  Added new instruction: " << *MIB);
     } else {
       // t2STR_PRE, t2STR_POST
@@ -1572,6 +1577,7 @@ bool 
ARMLoadStoreOpt::MergeBaseUpdateLoadStore(MachineInstr *MI) {
                      .addImm(Offset)
                      .add(predOps(Pred, PredReg))
                      .cloneMemRefs(*MI);
+      (void)MIB;
       LLVM_DEBUG(dbgs() << "  Added new instruction: " << *MIB);
     }
   }


        
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