Author: Jay Foad Date: 2021-01-11T13:32:34Z New Revision: 6dcf9207df11f5cdb0126e5c5632e93532642ed9
URL: https://github.com/llvm/llvm-project/commit/6dcf9207df11f5cdb0126e5c5632e93532642ed9 DIFF: https://github.com/llvm/llvm-project/commit/6dcf9207df11f5cdb0126e5c5632e93532642ed9.diff LOG: [AMDGPU] Fix a urem combine test to test what it was supposed to Added: Modified: llvm/test/CodeGen/AMDGPU/GlobalISel/combine-urem-pow-2.mir Removed: ################################################################################ diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/combine-urem-pow-2.mir b/llvm/test/CodeGen/AMDGPU/GlobalISel/combine-urem-pow-2.mir index f92e32dab08f..da6c8480b25e 100644 --- a/llvm/test/CodeGen/AMDGPU/GlobalISel/combine-urem-pow-2.mir +++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/combine-urem-pow-2.mir @@ -48,12 +48,14 @@ body: | ; GCN-LABEL: name: urem_s32_var_const2 ; GCN: liveins: $vgpr0 - ; GCN: %const:_(s32) = G_CONSTANT i32 1 + ; GCN: %var:_(s32) = COPY $vgpr0 + ; GCN: %const:_(s32) = G_CONSTANT i32 2 ; GCN: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1 ; GCN: [[ADD:%[0-9]+]]:_(s32) = G_ADD %const, [[C]] - ; GCN: $vgpr0 = COPY [[ADD]](s32) + ; GCN: %rem:_(s32) = G_AND %var, [[ADD]] + ; GCN: $vgpr0 = COPY %rem(s32) %var:_(s32) = COPY $vgpr0 - %const:_(s32) = G_CONSTANT i32 1 + %const:_(s32) = G_CONSTANT i32 2 %rem:_(s32) = G_UREM %var, %const $vgpr0 = COPY %rem ... _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits