Author: Martin Storsjö Date: 2021-01-08T10:04:44+02:00 New Revision: 7a91dad9e5fa17ed31484ea7f264363b9b821861
URL: https://github.com/llvm/llvm-project/commit/7a91dad9e5fa17ed31484ea7f264363b9b821861 DIFF: https://github.com/llvm/llvm-project/commit/7a91dad9e5fa17ed31484ea7f264363b9b821861.diff LOG: [llvm-readobj] [ARMWinEH] Clearly print an invalid case of packed unwind info as such As the actual windows unwinder doesn't support this case, don't pretend that it is supported when dumping the generated unwind info either, even if it would be possible to interpret it as something sensible. This should reduce the risk of us emitting such a case in code (although it's unlikely as long as the unwind info is generated through the SEH opcodes, as the opcodes can't describe this case). Differential Revision: https://reviews.llvm.org/D91529 Added: Modified: llvm/test/tools/llvm-readobj/COFF/arm64-packed-unwind.s llvm/tools/llvm-readobj/ARMWinEHPrinter.cpp Removed: ################################################################################ diff --git a/llvm/test/tools/llvm-readobj/COFF/arm64-packed-unwind.s b/llvm/test/tools/llvm-readobj/COFF/arm64-packed-unwind.s index f8c4d5e3074f..155c292e1649 100644 --- a/llvm/test/tools/llvm-readobj/COFF/arm64-packed-unwind.s +++ b/llvm/test/tools/llvm-readobj/COFF/arm64-packed-unwind.s @@ -139,7 +139,7 @@ // CHECK-NEXT: FrameSize: 32 // CHECK-NEXT: Prologue [ // CHECK-NEXT: sub sp, sp, #16 -// CHECK-NEXT: stp x19, lr, [sp, #-16]! +// CHECK-NEXT: INVALID! // CHECK-NEXT: end // CHECK-NEXT: ] // CHECK-NEXT: } diff --git a/llvm/tools/llvm-readobj/ARMWinEHPrinter.cpp b/llvm/tools/llvm-readobj/ARMWinEHPrinter.cpp index 46a949b99045..5995a09514c8 100644 --- a/llvm/tools/llvm-readobj/ARMWinEHPrinter.cpp +++ b/llvm/tools/llvm-readobj/ARMWinEHPrinter.cpp @@ -1223,10 +1223,12 @@ bool Decoder::dumpPackedARM64Entry(const object::COFFObjectFile &COFF, if (I == (RF.RegI() + 1) / 2 - 1 && RF.RegI() % 2 == 1) { // The last register, an odd register without a pair if (RF.CR() == 1) { - if (I == 0) // If this is the only register pair - SW.startLine() << format("stp x%d, lr, [sp, #-%d]!\n", 19 + 2 * I, - SavSZ); - else + if (I == 0) { // If this is the only register pair + // CR=1 combined with RegI=1 doesn't map to a documented case; + // it doesn't map to any regular unwind info opcode, and the + // actual unwinder doesn't support it. + SW.startLine() << "INVALID!\n"; + } else SW.startLine() << format("stp x%d, lr, [sp, #%d]\n", 19 + 2 * I, 16 * I); } else { _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits