Author: Chen Zheng Date: 2020-12-01T21:18:57-05:00 New Revision: 95d6042dd440f3db6a71e6a01413adc2f148f788
URL: https://github.com/llvm/llvm-project/commit/95d6042dd440f3db6a71e6a01413adc2f148f788 DIFF: https://github.com/llvm/llvm-project/commit/95d6042dd440f3db6a71e6a01413adc2f148f788.diff LOG: [NFC][PowerPC] code refactor: split IsReassociable to fma and add. Reviewed By: jsji Differential Revision: https://reviews.llvm.org/D92070 Added: Modified: llvm/lib/Target/PowerPC/PPCInstrInfo.cpp Removed: ################################################################################ diff --git a/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp b/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp index 45587504df56..4e3f0abf73c3 100644 --- a/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp +++ b/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp @@ -339,16 +339,28 @@ bool PPCInstrInfo::getFMAPatterns( return true; }; - auto IsReassociable = [&](const MachineInstr &Instr, int16_t &AddOpIdx, - bool IsLeaf, bool IsAdd) { - int16_t Idx = -1; - if (!IsAdd) { - Idx = getFMAOpIdxInfo(Instr.getOpcode()); - if (Idx < 0) - return false; - } else if (Instr.getOpcode() != - FMAOpIdxInfo[getFMAOpIdxInfo(Root.getOpcode())] - [InfoArrayIdxFAddInst]) + auto IsReassociableAdd = [&](const MachineInstr &Instr) { + if (Instr.getOpcode() != + FMAOpIdxInfo[getFMAOpIdxInfo(Root.getOpcode())][InfoArrayIdxFAddInst]) + return false; + + // Instruction can be reassociated. + // fast math flags may prohibit reassociation. + if (!(Instr.getFlag(MachineInstr::MIFlag::FmReassoc) && + Instr.getFlag(MachineInstr::MIFlag::FmNsz))) + return false; + + // Instruction operands are virtual registers for reassociation. + if (!IsAllOpsVirtualReg(Instr)) + return false; + + return true; + }; + + auto IsReassociableFMA = [&](const MachineInstr &Instr, int16_t &AddOpIdx, + bool IsLeaf) { + int16_t Idx = getFMAOpIdxInfo(Instr.getOpcode()); + if (Idx < 0) return false; // Instruction can be reassociated. @@ -361,7 +373,7 @@ bool PPCInstrInfo::getFMAPatterns( if (!IsAllOpsVirtualReg(Instr)) return false; - if (IsAdd && IsLeaf) + if (IsLeaf) return true; AddOpIdx = FMAOpIdxInfo[Idx][InfoArrayIdxAddOpIdx]; @@ -379,7 +391,7 @@ bool PPCInstrInfo::getFMAPatterns( int16_t AddOpIdx = -1; // Root must be a valid FMA like instruction. - if (!IsReassociable(Root, AddOpIdx, false, false)) + if (!IsReassociableFMA(Root, AddOpIdx, false)) return false; assert((AddOpIdx >= 0) && "add operand index not right!"); @@ -389,7 +401,7 @@ bool PPCInstrInfo::getFMAPatterns( // Prev must be a valid FMA like instruction. AddOpIdx = -1; - if (!IsReassociable(*Prev, AddOpIdx, false, false)) + if (!IsReassociableFMA(*Prev, AddOpIdx, false)) return false; assert((AddOpIdx >= 0) && "add operand index not right!"); @@ -397,11 +409,11 @@ bool PPCInstrInfo::getFMAPatterns( Register RegA = Prev->getOperand(AddOpIdx).getReg(); MachineInstr *Leaf = MRI.getUniqueVRegDef(RegA); AddOpIdx = -1; - if (IsReassociable(*Leaf, AddOpIdx, true, false)) { + if (IsReassociableFMA(*Leaf, AddOpIdx, true)) { Patterns.push_back(MachineCombinerPattern::REASSOC_XMM_AMM_BMM); return true; } - if (IsReassociable(*Leaf, AddOpIdx, true, true)) { + if (IsReassociableAdd(*Leaf)) { Patterns.push_back(MachineCombinerPattern::REASSOC_XY_AMM_BMM); return true; } _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
