Author: Carl Ritson Date: 2020-12-18T19:59:13+09:00 New Revision: b58b440d19c84f59aae4679608c55db0d95ff879
URL: https://github.com/llvm/llvm-project/commit/b58b440d19c84f59aae4679608c55db0d95ff879 DIFF: https://github.com/llvm/llvm-project/commit/b58b440d19c84f59aae4679608c55db0d95ff879.diff LOG: [AMDGPU][NFC] Document high parameter of f16 interp intrinsics Added: Modified: llvm/include/llvm/IR/IntrinsicsAMDGPU.td Removed: ################################################################################ diff --git a/llvm/include/llvm/IR/IntrinsicsAMDGPU.td b/llvm/include/llvm/IR/IntrinsicsAMDGPU.td index ea4a93f8bdef..2cab7f38e281 100644 --- a/llvm/include/llvm/IR/IntrinsicsAMDGPU.td +++ b/llvm/include/llvm/IR/IntrinsicsAMDGPU.td @@ -1330,6 +1330,7 @@ def int_amdgcn_interp_p2 : // See int_amdgcn_v_interp_p1 for why this is IntrNoMem. // __builtin_amdgcn_interp_p1_f16 <i>, <attr_chan>, <attr>, <high>, <m0> +// high selects whether high or low 16-bits are loaded from LDS def int_amdgcn_interp_p1_f16 : GCCBuiltin<"__builtin_amdgcn_interp_p1_f16">, Intrinsic<[llvm_float_ty], @@ -1338,6 +1339,7 @@ def int_amdgcn_interp_p1_f16 : ImmArg<ArgIndex<1>>, ImmArg<ArgIndex<2>>, ImmArg<ArgIndex<3>>]>; // __builtin_amdgcn_interp_p2_f16 <p1>, <j>, <attr_chan>, <attr>, <high>, <m0> +// high selects whether high or low 16-bits are loaded from LDS def int_amdgcn_interp_p2_f16 : GCCBuiltin<"__builtin_amdgcn_interp_p2_f16">, Intrinsic<[llvm_half_ty], _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits