[llvm-branch-commits] [llvm] [DAG][AArch64] Handle truncated buildvectors to allow and(subvector(anyext)) fold. (PR #133915)

@@ -7166,7 +7166,8 @@ SDValue DAGCombiner::visitAND(SDNode *N) { // if (and x, c) is known to be zero, return 0 unsigned BitWidth = VT.getScalarSizeInBits(); - ConstantSDNode *N1C = isConstOrConstSplat(N1); + ConstantSDNode *N1C = + isConstOrConstSplat(N1, /*AllowUn

[llvm-branch-commits] [clang] [llvm] release/20.x: [AArch64] Fix feature list for FUJITSU-MONAKA processor (#139212) (PR #139222)

https://github.com/davemgreen approved this pull request. https://github.com/llvm/llvm-project/pull/139222 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [clang] [llvm] release/20.x: [AArch64] Fix feature list for FUJITSU-MONAKA processor (#139212) (PR #139222)

davemgreen wrote: LGTM - changes look small and correct a regression since the previous release. https://github.com/llvm/llvm-project/pull/139222 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mai

[llvm-branch-commits] [llvm] [GlobalISel] Add computeNumSignBits for ASHR (PR #139503)

https://github.com/davemgreen created https://github.com/llvm/llvm-project/pull/139503 None Rate limit · GitHub body { background-color: #f6f8fa; color: #24292e; font-family: -apple-system,BlinkMacSystemFont,Segoe UI,Helvetica,Ari

[llvm-branch-commits] [llvm] [GlobalISel] Add computeKnownBits for G_SHUFFLE_VECTOR (PR #139505)

https://github.com/davemgreen created https://github.com/llvm/llvm-project/pull/139505 The code is similar to computeKnownBits and the code in SelectionDAG::ComputeNumSignBits. >From 68fc0c493331eaa56ebc862ef7dfb7106cabad82 Mon Sep 17 00:00:00 2001 From: David Green Date: Mon, 12 May 2025 07:

[llvm-branch-commits] [llvm] [GlobalISel] Add computeNumSignBits for G_BUILD_VECTOR. (PR #139506)

https://github.com/davemgreen created https://github.com/llvm/llvm-project/pull/139506 The code is similar to SelectionDAG::ComputeNumSignBits, but does not deal with truncating buildvectors. >From c1286744212c2b2f09e923161a6e6fc4d894e216 Mon Sep 17 00:00:00 2001 From: David Green Date: Mon,

[llvm-branch-commits] [llvm] AArch64: Fix some missing llvm.frexp test coverage (PR #146691)

@@ -141,6 +141,43 @@ define <2 x i32> @test_frexp_v2f16_v2i32_only_use_exp(<2 x half> %a) { ret <2 x i32> %result.1 } +define { <3 x float>, <3 x i32> } @test_frexp_v3f16_v3i32(<3 x float> %a) { davemgreen wrote: f16 -> f32 https://github.com/llvm/llvm-pr

[llvm-branch-commits] [llvm] AArch64: Fix some missing llvm.frexp test coverage (PR #146691)

@@ -1,5 +1,111 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2 ; RUN: llc -mtriple=aarch64-gnu-linux < %s | FileCheck -check-prefixes=CHECK %s +; RUN: llc -mtriple=aarch64-windows-pc-msvc < %s | FileCheck -check-prefixes=W

[llvm-branch-commits] [llvm] AArch64: Fix some missing llvm.frexp test coverage (PR #146691)

https://github.com/davemgreen edited https://github.com/llvm/llvm-project/pull/146691 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] AArch64: Fix some missing llvm.frexp test coverage (PR #146691)

https://github.com/davemgreen commented: Thanks for adding these. https://github.com/llvm/llvm-project/pull/146691 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commi

[llvm-branch-commits] [llvm] AArch64: Fix some missing llvm.frexp test coverage (PR #146691)

@@ -141,6 +141,43 @@ define <2 x i32> @test_frexp_v2f16_v2i32_only_use_exp(<2 x half> %a) { ret <2 x i32> %result.1 } +define { <3 x float>, <3 x i32> } @test_frexp_v3f16_v3i32(<3 x float> %a) { +; CHECK-LABEL: test_frexp_v3f16_v3i32: +; CHECK: @ %bb.0: +; CHECK-NEXT:

[llvm-branch-commits] [llvm] release/21.x: [AArch64, TTI] Disable RealUse check for vector insert/extract costs and Apple CPUs. (#146526) (PR #149815)

https://github.com/davemgreen requested changes to this pull request. I'm not a huge fan of hacks like this on the release branch. It should be the same patch as on trunk (or not be backported). https://github.com/llvm/llvm-project/pull/149815 ___ llv

[llvm-branch-commits] [llvm] release/20.x: [AArch64] Handle XAR with v1i64 operand types (#141754) (PR #143163)

https://github.com/davemgreen approved this pull request. LGTM. If you wanted something super-safe for a backport, it could just do `if (VT == v1i64) return false;`, but either way this looks OK to me. https://github.com/llvm/llvm-project/pull/143163

[llvm-branch-commits] [llvm] release/21.x: [AArch64, TTI] Disable RealUse check for vector insert/extract costs and Apple CPUs. (#146526) (PR #149815)

https://github.com/davemgreen approved this pull request. Thanks. The commit message could now do with an adjustment. Otherwise LGTM. https://github.com/llvm/llvm-project/pull/149815 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.o

[llvm-branch-commits] [llvm] release/21.x: [AArch64, TTI] Disable RealUse check for vector insert/extract costs and Apple CPUs. (#146526) (PR #149815)

davemgreen wrote: Yeah I think by the old LLVM rules the full change is fine. If tru is happy to take it onto the branch then that sounds OK to me. https://github.com/llvm/llvm-project/pull/149815 ___ llvm-branch-commits mailing list llvm-branch-commi

[llvm-branch-commits] [llvm] [DAG][AArch64] Handle truncated buildvectors to allow and(subvector(anyext)) fold. (PR #133915)

davemgreen wrote: Did you have a reason to need this change? https://github.com/llvm/llvm-project/pull/133915 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] ELF: Introduce R_AARCH64_PATCHINST relocation type. (PR #133534)

davemgreen wrote: > I'm not a an official maintainer, Yeah you are. If you say this LGTY then it SGTM :) https://github.com/llvm/llvm-project/pull/133534 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cg

[llvm-branch-commits] ELF: Introduce R_AARCH64_PATCHINST relocation type. (PR #133534)

https://github.com/davemgreen approved this pull request. https://github.com/llvm/llvm-project/pull/133534 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] DAG: Add assert to getNode for EXTRACT_SUBVECTOR indexes (PR #154099)

https://github.com/davemgreen approved this pull request. https://github.com/llvm/llvm-project/pull/154099 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] release/21.x: [AArch64][BTI] Add BTI at EH entries. (#155308) (PR #156170)

https://github.com/davemgreen updated https://github.com/llvm/llvm-project/pull/156170 >From 51081359fa4a76c9d20489084ce2a399b5bfc520 Mon Sep 17 00:00:00 2001 From: Shashi Shankar Date: Sat, 30 Aug 2025 11:56:03 +0200 Subject: [PATCH 1/2] [AArch64][BTI] Add BTI at EH entries. (#155308) Mark EH

[llvm-branch-commits] [llvm] release/21.x: [AArch64][BTI] Add BTI at EH entries. (#155308) (PR #156170)

davemgreen wrote: I managed to reproduce the original error and check that this fixes it. The extra EH_LABELS that needed to be removed were added in b933f0c376c9. https://github.com/llvm/llvm-project/pull/156170 ___ llvm-branch-commits mailing list l

[llvm-branch-commits] [llvm] release/21.x: [AArch64][BTI] Add BTI at EH entries. (#155308) (PR #156170)

https://github.com/davemgreen approved this pull request. https://github.com/llvm/llvm-project/pull/156170 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] ARM: Remove TRI argument from AddDReg (PR #158228)

https://github.com/davemgreen approved this pull request. This could maybe do with a better description of why it is changing, but it LGTM. https://github.com/llvm/llvm-project/pull/158228 ___ llvm-branch-commits mailing list llvm-branch-commits@lists

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