https://bugs.llvm.org/show_bug.cgi?id=36828
Bug ID: 36828
Summary: [X86] SkylakeServer scheduler model doesn't account
for port 0 and 1 being joined for 512 bit operations
Product: libraries
Version: trunk
Hardware: PC
OS: Windows NT
Status: NEW
Severity: enhancement
Priority: P
Component: Backend: X86
Assignee: unassignedb...@nondot.org
Reporter: craig.top...@gmail.com
CC: llvm-bugs@lists.llvm.org
I'm not sure how to model this in the scheduler, but 512 bit ALU instructions
need to go out on port 0 and 1 simultaneously or on port 5.
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