Changes in directory llvm:
configure updated: 1.225 - 1.226
---
Log message:
For PR747: http://llvm.cs.uiuc.edu/PR747 :
If we fail to find a required program, simply set that program to echo
out something that tells the user the situation. That is, instead of just
true runtest we now get echo
Changes in directory llvm/autoconf:
configure.ac updated: 1.222 - 1.223
---
Log message:
For PR747: http://llvm.cs.uiuc.edu/PR747 :
If we fail to find a required program, simply set that program to echo
out something that tells the user the situation. That is, instead of just
true runtest we
Changes in directory llvm/lib/CodeGen/SelectionDAG:
SelectionDAGISel.cpp updated: 1.227 - 1.228
---
Log message:
Insert a VBIT_CONVERT between a FORMAL_ARGUMENT node and its vector uses
(VAND, VADD, etc.). Legalizer will assert otherwise.
---
Diffs of the changes: (+16 -3)
Changes in directory llvm/lib/Target/X86:
README.txt updated: 1.98 - 1.99
---
Log message:
A couple of new entries.
---
Diffs of the changes: (+37 -0)
README.txt | 37 +
1 files changed, 37 insertions(+)
Index: llvm/lib/Target/X86/README.txt
diff -u
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.192 - 1.193
---
Log message:
Support for passing 128-bit vector arguments via XMM registers.
---
Diffs of the changes: (+97 -27)
X86ISelLowering.cpp | 124
1
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.193 - 1.194
X86InstrInfo.td updated: 1.262 - 1.263
---
Log message:
Make x86 isel lowering produce tailcall nodes. They are match to normal calls
for now.
Patch contributed by Alexander Friedman.
---
Diffs of the
Changes in directory llvm-poolalloc/runtime/FL2Allocator:
PoolAllocator.cpp updated: 1.51 - 1.52
PoolAllocator.h updated: 1.25 - 1.26
---
Log message:
realloc_pc
---
Diffs of the changes: (+16 -7)
PoolAllocator.cpp | 20 ++--
PoolAllocator.h |3 ++-
2 files changed,
Changes in directory llvm/test/Regression/Transforms/InstCombine:
vec_insert_to_shuffle.ll added (r1.1)
---
Log message:
This should turn into one vector shuffle instruction.
---
Diffs of the changes: (+14 -0)
vec_insert_to_shuffle.ll | 14 ++
1 files changed, 14
Changes in directory llvm/lib/Transforms/Scalar:
InstructionCombining.cpp updated: 1.471 - 1.472
---
Log message:
Add support for inserting undef into a vector. This implements
Transforms/InstCombine/vec_insert_to_shuffle.ll
---
Diffs of the changes: (+14 -3)
InstructionCombining.cpp |
Changes in directory llvm/lib/Target/X86:
README.txt updated: 1.99 - 1.100
---
Log message:
Add a note
---
Diffs of the changes: (+44 -0)
README.txt | 44
1 files changed, 44 insertions(+)
Index: llvm/lib/Target/X86/README.txt
diff -u
Changes in directory llvm-www:
www-index.html updated: 1.127 - 1.128
---
Log message:
Grammar-o's and updates, thanks to Gabor!
---
Diffs of the changes: (+2 -2)
www-index.html |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
Index: llvm-www/www-index.html
diff -u
Changes in directory llvm/lib/Target/PowerPC:
README_ALTIVEC.txt updated: 1.33 - 1.34
---
Log message:
Add a note
---
Diffs of the changes: (+8 -0)
README_ALTIVEC.txt |8
1 files changed, 8 insertions(+)
Index: llvm/lib/Target/PowerPC/README_ALTIVEC.txt
diff -u
Changes in directory llvm/test/Regression/CodeGen/X86:
2006-04-27-ISelFoldingBug.ll added (r1.1)
---
Log message:
Test case for PR748: http://llvm.cs.uiuc.edu/PR748
---
Diffs of the changes: (+31 -0)
2006-04-27-ISelFoldingBug.ll | 31 +++
1 files changed, 31
Changes in directory llvm/lib/CodeGen:
VirtRegMap.cpp updated: 1.58 - 1.59
---
Log message:
When we have a two-address instruction where the input cannot be clobbered
and is already available, instead of falling back to emitting a load, fall
back to emitting a reg-reg copy. This generates
Changes in directory llvm/utils/TableGen:
DAGISelEmitter.cpp updated: 1.197 - 1.198
---
Log message:
When isel'ing a node, mark its operands InFlight before selecting them. These
nodes should not be folded into other nodes.
This fixes the miscompilation of PR 749: http://llvm.cs.uiuc.edu/PR749
Changes in directory llvm/lib/CodeGen/SelectionDAG:
SelectionDAGISel.cpp updated: 1.228 - 1.229
---
Log message:
Added a temporary option -no-isel-fold-inflight to control whether a inflight
node can be folded.
---
Diffs of the changes: (+12 -1)
SelectionDAGISel.cpp | 13 -
Changes in directory llvm/include/llvm/CodeGen:
SelectionDAGISel.h updated: 1.14 - 1.15
---
Log message:
Added a temporary option -no-isel-fold-inflight to control whether a inflight
node can be folded.
---
Diffs of the changes: (+1 -0)
SelectionDAGISel.h |1 +
1 files changed, 1
Changes in directory llvm-test:
Makefile.programs updated: 1.203 - 1.204
---
Log message:
Temporarily set -no-isel-fold-inflight to LLCBETAOPTION.
---
Diffs of the changes: (+1 -1)
Makefile.programs |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index:
Changes in directory llvm/lib/Target/X86:
X86RegisterInfo.cpp updated: 1.144 - 1.145
---
Log message:
Use movaps instead of movapd for spill / restore.
---
Diffs of the changes: (+2 -2)
X86RegisterInfo.cpp |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
Index:
Changes in directory llvm/lib/Transforms/Scalar:
Reassociate.cpp updated: 1.60 - 1.61
---
Log message:
Fix Transforms/Reassociate/2006-04-27-ReassociateVector.ll
---
Diffs of the changes: (+3 -2)
Reassociate.cpp |5 +++--
1 files changed, 3 insertions(+), 2 deletions(-)
Index:
Changes in directory llvm/test/Regression/Transforms/Reassociate:
2006-04-27-ReassociateVector.ll added (r1.1)
---
Log message:
new testcase
---
Diffs of the changes: (+7 -0)
2006-04-27-ReassociateVector.ll |7 +++
1 files changed, 7 insertions(+)
Index:
Changes in directory llvm/lib/CodeGen:
VirtRegMap.cpp updated: 1.59 - 1.60
---
Log message:
Mapping of physregs can make it so that the designated and input physregs are
the same. In this case, don't emit a noop copy.
---
Diffs of the changes: (+13 -0)
VirtRegMap.cpp | 13 +
Changes in directory llvm/lib/Target/X86:
X86ISelLowering.cpp updated: 1.194 - 1.195
---
Log message:
TargetLowering::LowerArguments should return a VBIT_CONVERT of
FORMAL_ARGUMENTS SDOperand in the return result vector.
---
Diffs of the changes: (+1 -1)
X86ISelLowering.cpp |2 +-
1
Changes in directory llvm/lib/CodeGen/SelectionDAG:
SelectionDAGISel.cpp updated: 1.229 - 1.230
---
Log message:
TargetLowering::LowerArguments should return a VBIT_CONVERT of
FORMAL_ARGUMENTS SDOperand in the return result vector.
---
Diffs of the changes: (+14 -16)
SelectionDAGISel.cpp
Changes in directory llvm/lib/Support:
CommandLine.cpp updated: 1.66 - 1.67
---
Log message:
Fix PR743: http://llvm.cs.uiuc.edu/PR743 : emit -help output of a tool to cout,
not cerr.
---
Diffs of the changes: (+20 -20)
CommandLine.cpp | 40
1
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