[llvm-commits] CVS: llvm/test/CodeGen/ARM/2007-03-15-GEP-Idx-Sink.ll

Changes in directory llvm/test/CodeGen/ARM: 2007-03-15-GEP-Idx-Sink.ll added (r1.1) --- Log message: GEP index sink test case. --- Diffs of the changes: (+73 -0) 2007-03-15-GEP-Idx-Sink.ll | 73 + 1 files changed, 73 insertions(+) Index: llvm/

[llvm-commits] CVS: llvm/test/CodeGen/X86/2007-03-16-InlineAsm.ll

Changes in directory llvm/test/CodeGen/X86: 2007-03-16-InlineAsm.ll added (r1.1) --- Log message: Test case for X86 inline asm constraint 'I' --- Diffs of the changes: (+28 -0) 2007-03-16-InlineAsm.ll | 28 1 files changed, 28 insertions(+) Index: llvm/test

[llvm-commits] CVS: llvm/lib/Target/X86/X86ISelLowering.cpp

Changes in directory llvm/lib/Target/X86: X86ISelLowering.cpp updated: 1.371 -> 1.372 --- Log message: Support 'I' inline asm constraint. --- Diffs of the changes: (+11 -0) X86ISelLowering.cpp | 11 +++ 1 files changed, 11 insertions(+) Index: llvm/lib/Target/X86/X86ISelLowerin

[llvm-commits] CVS: llvm/lib/Target/ARM/ARMISelLowering.cpp

Changes in directory llvm/lib/Target/ARM: ARMISelLowering.cpp updated: 1.23 -> 1.24 --- Log message: Only ARMv6 has BSWAP. Fix MultiSource/Applications/aha test. --- Diffs of the changes: (+4 -0) ARMISelLowering.cpp |4 1 files changed, 4 insertions(+) Index: llvm/lib/Target/ARM

[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp

Changes in directory llvm/lib/CodeGen/SelectionDAG: SelectionDAGISel.cpp updated: 1.386 -> 1.387 --- Log message: Turn on GEP index sinking by default. --- Diffs of the changes: (+0 -7) SelectionDAGISel.cpp |7 --- 1 files changed, 7 deletions(-) Index: llvm/lib/CodeGen/SelectionD

[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp

Changes in directory llvm/lib/CodeGen/SelectionDAG: SelectionDAGISel.cpp updated: 1.385 -> 1.386 --- Log message: Stupid bug. --- Diffs of the changes: (+1 -1) SelectionDAGISel.cpp |2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAGI

Re: [llvm-commits] llvm-gcc: emit switch cases with a wide range as a conditional branch

> I am testing the following patch. While I was there, I made it agnostic > as to the signedness of the switch expression and cases (in Ada they can > be unsigned). I forgot to emit a new BB after the unconditional branch to the default label. Attached patch is otherwise the same as the previous

[llvm-commits] CVS: llvm/lib/Target/X86/X86ISelLowering.cpp X86InstrMMX.td

Changes in directory llvm/lib/Target/X86: X86ISelLowering.cpp updated: 1.370 -> 1.371 X86InstrMMX.td updated: 1.20 -> 1.21 --- Log message: And now support for MMX logical operations. --- Diffs of the changes: (+54 -2) X86ISelLowering.cpp | 18 ++ X86InstrMMX.td |

[llvm-commits] CVS: llvm/test/CodeGen/X86/mmx-arith.ll

Changes in directory llvm/test/CodeGen/X86: mmx-arith.ll updated: 1.3 -> 1.4 --- Log message: And now support for MMX logical operations. --- Diffs of the changes: (+89 -59) mmx-arith.ll | 148 +++ 1 files changed, 89 insertions(+),

[llvm-commits] CVS: llvm-test/Makefile.programs

Changes in directory llvm-test: Makefile.programs updated: 1.259 -> 1.260 --- Log message: Test GEP index sinking as llcbeta. --- Diffs of the changes: (+2 -1) Makefile.programs |3 ++- 1 files changed, 2 insertions(+), 1 deletion(-) Index: llvm-test/Makefile.programs diff -u llvm-tes

[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp

Changes in directory llvm/lib/CodeGen/SelectionDAG: SelectionDAGISel.cpp updated: 1.384 -> 1.385 --- Log message: Sink a binary expression into its use blocks if it is a loop invariant computation used as GEP indexes and if the expression can be folded into target addressing mode of GEP load /

[llvm-commits] CVS: llvm/lib/Target/ARM/ARMISelLowering.cpp ARMISelLowering.h

Changes in directory llvm/lib/Target/ARM: ARMISelLowering.cpp updated: 1.22 -> 1.23 ARMISelLowering.h updated: 1.3 -> 1.4 --- Log message: Added isLegalAddressExpression(). Only allows X +/- C for now. --- Diffs of the changes: (+21 -0) ARMISelLowering.cpp | 15 +++ ARMISelLow

[llvm-commits] CVS: llvm/include/llvm/Target/TargetLowering.h

Changes in directory llvm/include/llvm/Target: TargetLowering.h updated: 1.112 -> 1.113 --- Log message: Added isLegalAddressExpression hook to test if the given expression can be folded into target addressing mode for the given type. --- Diffs of the changes: (+7 -1) TargetLowering.h |

[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp

Changes in directory llvm/lib/CodeGen/SelectionDAG: TargetLowering.cpp updated: 1.96 -> 1.97 --- Log message: Added isLegalAddressExpression hook to test if the given expression can be folded into target addressing mode for the given type. --- Diffs of the changes: (+8 -0) TargetLowering.cp

[llvm-commits] CVS: llvm/include/llvm/Target/TargetInstrInfo.h

Changes in directory llvm/include/llvm/Target: TargetInstrInfo.h updated: 1.112 -> 1.113 --- Log message: These forward declarations are not needed. --- Diffs of the changes: (+0 -5) TargetInstrInfo.h |5 - 1 files changed, 5 deletions(-) Index: llvm/include/llvm/Target/TargetInst