This is done. Now we emit this:
_array:
subq$8, %rsp
mulss LCPI1_0(%rip), %xmm0
call_qux
mulss LCPI1_0(%rip), %xmm0
addq$8, %rsp
ret
Evan
On Aug 2, 2007, at 8:50 AM, Chris Lattner wrote:
>> Mark the SSE and MMX load instructi
Author: evancheng
Date: Thu Aug 30 00:54:07 2007
New Revision: 41599
URL: http://llvm.org/viewvc/llvm-project?rev=41599&view=rev
Log:
Added support to fold X86 load / store instructions. This allow rematerialized
loads to be folded into their uses.
Modified:
llvm/trunk/lib/Target/X86/X86Regi
Author: evancheng
Date: Thu Aug 30 00:53:02 2007
New Revision: 41598
URL: http://llvm.org/viewvc/llvm-project?rev=41598&view=rev
Log:
Try fold re-materialized load instructions into its uses.
Modified:
llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp
Modified: llvm/trunk/lib/CodeGen/LiveInter
Author: evancheng
Date: Thu Aug 30 00:52:20 2007
New Revision: 41597
URL: http://llvm.org/viewvc/llvm-project?rev=41597&view=rev
Log:
Add a variant of foldMemoryOperand to fold any load / store, not just load /
store from / to stack slots.
Modified:
llvm/trunk/include/llvm/CodeGen/LiveInterv
Author: evancheng
Date: Thu Aug 30 00:50:32 2007
New Revision: 41596
URL: http://llvm.org/viewvc/llvm-project?rev=41596&view=rev
Log:
Added CreateFrameIndex to create a FrameIndex MachineOperand without a
MachineInstr.
Modified:
llvm/trunk/include/llvm/CodeGen/MachineInstr.h
Modified: llvm/
Author: evancheng
Date: Thu Aug 30 00:49:43 2007
New Revision: 41595
URL: http://llvm.org/viewvc/llvm-project?rev=41595&view=rev
Log:
Mark load instructions with isLoad = 1.
Modified:
llvm/trunk/lib/Target/X86/X86InstrFPStack.td
llvm/trunk/lib/Target/X86/X86InstrInfo.td
llvm/trunk/lib
Author: void
Date: Wed Aug 29 20:14:03 2007
New Revision: 41594
URL: http://llvm.org/viewvc/llvm-project?rev=41594&view=rev
Log:
Enable EH by default
Modified:
llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp
Modified: llvm-gcc-4.2/trunk/gcc/llvm-backend.cpp
URL:
http://llvm.org/viewvc/llvm-project/
Author: void
Date: Wed Aug 29 20:10:18 2007
New Revision: 41593
URL: http://llvm.org/viewvc/llvm-project?rev=41593&view=rev
Log:
Enable exception handling by default.
Modified:
llvm-gcc-4.0/trunk/gcc/llvm-backend.cpp
Modified: llvm-gcc-4.0/trunk/gcc/llvm-backend.cpp
URL:
http://llvm.org/vie
Author: void
Date: Wed Aug 29 19:59:19 2007
New Revision: 41590
URL: http://llvm.org/viewvc/llvm-project?rev=41590&view=rev
Log:
Use i64 on a PPC64 machine
Modified:
llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp
Modified: llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp
URL:
http://llv
Author: johannes
Date: Wed Aug 29 19:23:21 2007
New Revision: 41587
URL: http://llvm.org/viewvc/llvm-project?rev=41587&view=rev
Log:
Change LegalFPImmediates to use APFloat.
Add APFloat interfaces to ConstantFP, SelectionDAG.
Fix integer bit in double->APFloat conversion.
Convert LegalizeDAG to us
Author: asl
Date: Wed Aug 29 18:18:48 2007
New Revision: 41584
URL: http://llvm.org/viewvc/llvm-project?rev=41584&view=rev
Log:
Fix use of declaration inside case block
Modified:
llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
Author: asl
Date: Wed Aug 29 14:28:29 2007
New Revision: 41578
URL: http://llvm.org/viewvc/llvm-project?rev=41578&view=rev
Log:
Lower FRAME_TO_ADDR_OFFSET to zero by default (if not custom lowered)
Modified:
llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
Modified: llvm/trunk/lib/CodeGen
Hi Evan,
> > It already had ECX or'd in.
>
> Then plz write something like "0xb8 | 1" and comment it so it's more
> clear (to me at least :-).
this is from the original version - the version I committed before
the holidays already did 0xb8 | 1, and the version I just committed
does it even bet
Author: baldrick
Date: Wed Aug 29 14:01:20 2007
New Revision: 41577
URL: http://llvm.org/viewvc/llvm-project?rev=41577&view=rev
Log:
Move getX86RegNum into X86RegisterInfo and use it
in the trampoline lowering. Lookup the jump and
mov opcodes for the trampoline rather than hard
coding them.
Remo
Author: raulherbster
Date: Wed Aug 29 13:21:29 2007
New Revision: 41576
URL: http://llvm.org/viewvc/llvm-project?rev=41576&view=rev
Log:
Alphabetize Raul's entry.
Modified:
llvm/trunk/CREDITS.TXT
Modified: llvm/trunk/CREDITS.TXT
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/CREDITS.TX
Author: evancheng
Date: Wed Aug 29 13:19:23 2007
New Revision: 41575
URL: http://llvm.org/viewvc/llvm-project?rev=41575&view=rev
Log:
Merge -r41572:41573 llvm-gcc-4.0/trunk
Modified:
llvm-gcc-4.2/trunk/gcc/config/i386/i386.h
Modified: llvm-gcc-4.2/trunk/gcc/config/i386/i386.h
URL:
http://ll
On 8/29/07, Raul Herbster <[EMAIL PROTECTED]> wrote:
> --- llvm/trunk/CREDITS.TXT (original)
> +++ llvm/trunk/CREDITS.TXT Wed Aug 29 11:51:52 2007
> @@ -240,4 +240,6 @@
> D: MMX & SSSE3 instructions
> D: SPEC2006 support
>
> -
> +N: Raul Fernandes Herbster
> +E: [EMAIL PROTECTED]
> +D: JIT suppor
On Aug 28, 2007, at 11:46 AM, Duncan Sands wrote:
> Hi Evan, thanks for your comments.
>
3. In X86TargetLowering::LowerTRAMPOLINE():
+case CallingConv::X86_StdCall: {
+ Move = 0xb9; // Pass chain in ECX
I assume this is the ModR/M byte?
>>>
>>> Well, it's MOV32ri
Thanks Evan, don't forget to apply this to 4.2 also :)
-Chris
On Aug 29, 2007, at 10:55 AM, Evan Cheng wrote:
> Author: evancheng
> Date: Wed Aug 29 12:55:47 2007
> New Revision: 41573
>
> URL: http://llvm.org/viewvc/llvm-project?rev=41573&view=rev
> Log:
> Added missing x86 feature string for
Author: evancheng
Date: Wed Aug 29 12:55:47 2007
New Revision: 41573
URL: http://llvm.org/viewvc/llvm-project?rev=41573&view=rev
Log:
Added missing x86 feature string for 64-bit mode.
Modified:
llvm-gcc-4.0/trunk/gcc/config/i386/i386.h
Modified: llvm-gcc-4.0/trunk/gcc/config/i386/i386.h
URL:
Author: raulherbster
Date: Wed Aug 29 11:51:52 2007
New Revision: 41569
URL: http://llvm.org/viewvc/llvm-project?rev=41569&view=rev
Log:
New contributor added
Modified:
llvm/trunk/CREDITS.TXT
Modified: llvm/trunk/CREDITS.TXT
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/CREDITS.TXT?re
Author: tbrethou
Date: Wed Aug 29 11:38:16 2007
New Revision: 41568
URL: http://llvm.org/viewvc/llvm-project?rev=41568&view=rev
Log:
Updating configure script to enable MIPS.
Modified:
llvm/trunk/configure
Modified: llvm/trunk/configure
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/co
Author: lattner
Date: Wed Aug 29 11:32:50 2007
New Revision: 41567
URL: http://llvm.org/viewvc/llvm-project?rev=41567&view=rev
Log:
Silence implicit 64->32-bit conversion warnings.
Modified:
llvm/trunk/include/llvm/Instructions.h
Modified: llvm/trunk/include/llvm/Instructions.h
URL:
http://
Author: lattner
Date: Wed Aug 29 11:15:23 2007
New Revision: 41565
URL: http://llvm.org/viewvc/llvm-project?rev=41565&view=rev
Log:
update these
Modified:
llvm/trunk/lib/AsmParser/llvmAsmParser.cpp.cvs
llvm/trunk/lib/AsmParser/llvmAsmParser.y.cvs
Modified: llvm/trunk/lib/AsmParser/llvmAs
Author: lattner
Date: Wed Aug 29 11:21:18 2007
New Revision: 41566
URL: http://llvm.org/viewvc/llvm-project?rev=41566&view=rev
Log:
getMinSignedBits needs to take into consider the sign bit when the value is
positive.
Modified:
llvm/trunk/include/llvm/ADT/APInt.h
Modified: llvm/trunk/includ
Author: baldrick
Date: Wed Aug 29 09:34:36 2007
New Revision: 41563
URL: http://llvm.org/viewvc/llvm-project?rev=41563&view=rev
Log:
Let languages specify how to add a catch-all to the
end of an eh_selector call.
Modified:
llvm-gcc-4.2/trunk/gcc/cp/except.c
llvm-gcc-4.2/trunk/gcc/except.c
Author: asl
Date: Wed Aug 29 04:27:52 2007
New Revision: 41562
URL: http://llvm.org/viewvc/llvm-project?rev=41562&view=rev
Log:
Unbreak sparc builds
Modified:
llvm-gcc-4.0/trunk/gcc/config/sparc/sparc.h
Modified: llvm-gcc-4.0/trunk/gcc/config/sparc/sparc.h
URL:
http://llvm.org/viewvc/llvm-p
Author: baldrick
Date: Wed Aug 29 02:01:18 2007
New Revision: 41561
URL: http://llvm.org/viewvc/llvm-project?rev=41561&view=rev
Log:
Use the correct personality and unwind_resume functions for
the language being compiled.
Modified:
llvm-gcc-4.2/trunk/gcc/ada/misc.c
llvm-gcc-4.2/trunk/gcc/
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